Publication List of Prof. Liang-Gee Chen

(A) Refereed Paper

I. International Journals

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1. Lian, C.J., Chien, S.Y., Lin, C.P., Tseng, P.C., and Chen, L.G., ¡§Power-Aware Multimedia: Concepts and Design Perspectives,¡¨ Circuits and Systems Magazine, IEEE, Volume 7, Issue 2, 2007. (Second quarter)

2. Cheng, C.-C., Huang, C.-T., Chen, C.-Y., Lian, C.-J., and Chen, L.-G., ¡§On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, Volume 17, Issue 7, July 2007.

3. Chen, T.C., Chen, Y.H., Tsai, S.F., Chien, S.Y., and Chen, L.G., ¡§Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, Volume 17, Issue 5, May 2007.

4. Chang, Y.W., Cheng, C.C., Chen, C.C., Fang, H.C., and Chen, L.G., ¡§124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec Without Tile Memory,¡¨ Circuits and Systems for Video Technology, IEEE Transactions on, Volume 17, Issue 4, April 2007.

5. Tung-Chien Chen, Chuan-Yung Tsai, Yu-Wen Huang, and Liang-Gee Chen, ¡§Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC,¡¨ Circuits and Systems for Video Technology, IEEE Transactions on, Volume 17, Issue 2, Feb. 2007

6. Tung-Chien Chen; Hung-Chi Fang; Chung-Jr Lian; Chen-Han Tsai; Yu-Wen Huang; To-Wei Chen; Ching-Yeh Chen; Yu-Han Chen; Chuan-Yung Tsai; Liang-Gee Chen; ¡§Algorithm analysis and architecture design for HDTV applications,¡¨ Circuits and Devices Magazine, IEEE, May-June 2006

7. Chen, T.-C., Huang, Y.-W., Tsai, C.-Y., Hsieh, B.-Y., Chen, L.-G., ¡§Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC,¡¨ Circuits and Systems II: Express Briefs, IEEE Transactions on, Volume 53, Issue 9, pp. 832-836, Sept. 2006

8. Ding, L.-F., Chien, S.-Y., Chen, L.-G., ¡§Joint Prediction Algorithm and Architecture for Stereo Video Hybrid Coding Systems,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, Volume 16, Issue 11, pp. 1324-1337, Nov. 2006

9. Chen, C.-Y., Huang, C.-T., Chen, Y.-H., Chien, S.-Y., Chen, L.-G., ¡§System Analysis of VLSI Architecture for 5/3 and 1/3 Motion-Compensated Temporal Filtering,¡¨ IEEE Transactions on Signal Processing, Volume 54, Issue 10, pp. 4004-4014, Oct. 2006

10. Yung-Chi Chang, Chih-Wei Hsu, Wei-Min Chao, and Liang-Gee Chen, ¡§Interactive Content-aware Video Streaming System with Fine Granularity Scalability¡¨ The Journal of VLSI Signal Processing, vol. 44, no. 1, pp. 117 - 134, 2006

11. Shao-Yi Chien, Bing-Yu Hsieh, Yu-Wen Huang, Shyh-Yih Ma, and Liang-Gee Chen, ¡§Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems,¡¨ The Journal of VLSI Signal Processing, vol. 42, no. 3, pp. 241 - 255, March 2006

12. Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, and Liang-Gee Chen, ¡§Level C+ data reuse scheme for motion estimation with corresponding coding orders,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, no. 4, pp553 ¡V 558, April 2006

13. Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Shyh-Yih Ma, and Liang-Gee Chen, ¡§Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, no. 4, pp. 507 ¡V 522, April 2006

14. Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, and Liang-Gee Chen, ¡§Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, no. 6, pp. 673 ¡V 688, June 2006

15. C.-Y. Chen, Y.-W. Huang, C.-L. Lee and L.-G. Chen, ¡§One-Pass Computation-Aware Motion Estimation With Adaptive Search Strategy,¡¨ IEEE Transactions on Multimedia, vol. 8, no. 4, pp. 698 ¡V 706, Aug. 2006

16. Y.-W. Chang, H.-C. Fang, C.-C. Cheng, C.-C. Chen, and L.-G. Chen, ¡§Pre-Compression Quality Control Algorithm for JPEG 2000, ¡§, IEEE Transaction on Image Processing, Volume 15, Issue 11, pp. 3279-3293 Nov. 2006 (M25-92C-04a, TSMC 0.18um)

17. H.-C. Fang, Y.-W. Chang, C.-C. Cheng, C.-C. Chen, and L.-G. Chen, ¡§Memory Efficient JPEG 2000 Architecture with Stripe Pipeline Scheduling,¡¨ , to appear, Journal of VLSI Signal Processing Systems (T18-93C-35a, TSMC 0.18um)

18. H.-C. Fang, Y.-W. Chang, T.-C. Wang, C.-T. Huang, and L.-G. Chen ¡§High Performance JPEG 2000 Encoder with Rate-Distortion Optimization, ¡§, IEEE Transactions on Multimedia, vol. 8, no. 4, pp:645 ¡V 653, Aug. 2006 (M25-92C-04a, TSMC 0.18um)

19. H.-C. Fang, Y.-W. Chang, T.-C. Wang, C.-J. Lian, and L.-G. Chen, ¡§Parallel Embedded Block Coding Architecture for JPEG 2000,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, No. 9, pp. 1086-1097, September 2005 (M25-92C-04a, TSMC 0.18um)

20. Ching-Yeh Chen, Shao-Yi Chien, Yu-Wen Huang, Tung-Chien Chen, Tu-Chih Wang, and Liang-Gee Chen, ¡§Analysis and Architecture Design of Variable Block Size Motion Estimation for H.264/AVC ¡§ IEEE Transactions on Circuits and Systems, Part I, vol. 53, no. 3, pp. 578 ¡V 593, March 2006 (SCI/EI) (U18-93C-07 ,UMC 0.18um 1P6M CMOS)

21. Yu-Wen Huang, Ching-Yeh Chen, Chen-Han Tsai, Chun-Fu Shen, and Liang-Gee Chen, ¡§Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results¡§, The Journal of VLSI Signal Processing, vol. 42, no. 3, pp. 297 - 320, March 2006 (SCI/EI)

22. C.-T. Huang, P.-C. Tseng, L.-G. Chen, "VLSI Architecture for Lifting-based Shape-Adaptive Discrete Wavelet Transform with Odd-symmetric Filters," Journal of VLSI Signal Processing Systems, vol. 40, pp175-188, 2005. (SCI/EI) (M25-91E-01a, tsmc0.25)

23. S.-W. Huang, T.-H. Tsai, and L.-G. Chen, ¡§Fast decomposition of filterbanks for the state-of-the-art audio coding¡¨ IEEE Signal Processing Letters, vol. 12, no. 10, pp. 693-396, Oct. 2005.

24. P.-J. Lee, Homer H. Chen, W.-J. Wang, and L.-G. Chen, ¡§Feature-Based Error Concealment for Object-Based Video,¡¨ IEICE Transactions Visual Communications, vol. E88-B, no. 6, p.2616-2626, June 2005. (SCI/EI) ()

25. Y.-C. Chang, C.-C. Huang, W.-M. Chao, and L.-G. Chen, ¡§An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System,¡¨ Journal of VLSI Signal Processing Systems, Vol. 41, No. 2, pp. 183-191, Sep. 2005 (SCI & EI) (S35-91C-11a, TSMC 0.35)

26. S.-W. Huang, T.-H. Tsai, and L.-G. Chen, ¡§A low complexity design of psycho-acoustic model for MPEG-2/4 advanced audio coding,¡¨ IEEE Transactions on Consumer Electronics, Vol. 50, No. 4, pp. 1209-1217, Nov. 2004 (SCI & EI) ()

27. Y.-C. Chang, W.-M. Chao, C.-W. Hsu, and L.-G. Chen, ¡§Platform-based MPEG-4 SOC design for video communication,¡¨, Journal of VLSI Signal Processing Systems, vol. 42, no. 1, pp. 7 - 19, January 2006 (SCI & EI) (S35-91C-09a, TSMC 0.35)

28. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 7, pp. 910-920, July 2005. (SCI & EI) ()

29. Y.-L. Chang, S.-F. Lin, C.-Y. Chen, and L.-G. Chen, ¡§Video De-interlacing by Adaptive 4-Field Global/Local Motion Compensated Approach,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 12, pp. 1569-1582, Dec. 2005. (SCI & EI) ()

30. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform,¡¨ IEEE Transactions on Signal Processing, vol. 53, NO. 4. pp. 1575-1586, April 2005 (SCI & EI)()

31. H.-C. Fang, T.-C. Wang, Y.-W. Chang, C.-J. Lian, and L.-G. Chen, ¡§Parallel EBCOT Architecture for JPEG-2000,¡¨ to appear, IEEE Transactions on Circuits and Systems for Video Technology. (SCI & EI)(M2592c04a, TSMC 0.25)

32. Y.-W. Huang, B.-Y. Hsieh, T.-C. Chen, and L.-G. Chen, ¡§Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, pp. 378-401, March 2005 (SCI & EI) (M2592C10a, TSMC 0.25)

33. P.-C Tseng, Y.-C. Chang, Y.-W. Huang, H.-C. Fang, C.-T. Huang, and L.-G. Chen, ¡§Advances in hardware architectures for image and video coding ¡V a survey,¡¨ Proceedings of IEEE, vol. 93, no. 1, pp. 184-197, January 2005 . (SCI & EI) ( )

34. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, ¡§Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems,¡¨ Journal of VLSI Signal Processing Systems, vol. 41, no. 1, pp. 35-47, August 2005. (SCI & EI) (S35-90E-53a, TSMC 0.35)

35. S.-Y. Chien, Y.-W. Huang, C.-Y. Chen, H. H. Chen, and L.-G. Chen, ¡§Hardware architecture design of video compression for multimedia communication systems,¡¨ IEEE Communications Magazine, vol. 43, no. 8, pp. 122-131, Aug. 2005.

36. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§VLSI architecture for forward discrete wavelet transform based on B-spline factorization,¡¨ Journal of VLSI Signal Processing Systems. (SCI & EI), vol. 40, pp343-353, 2005.

37. S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, ¡§Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 9, pp.1156-1169, Sept. 2005. (SCI & EI) (S35-90B-05u)

38. S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, S.-Y. Ma, and L.-G. Chen, ¡§Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques,¡¨ IEEE Transactions on Multimedia, vol. 6, no. 5, pp. 732-748, October 2004. (SCI & EI) (S35-90D-36a)

39. Y.-W. Huang, S.-Y. Chien, B.-Y. Hsieh, and L.-G. Chen, ¡§Global elimination algorithm and architecture design for fast block matching motion estimation,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 14, no. 6, pp. 898-907, June 2004. (SCI & EI) (S35-91C-08a)

40. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform,¡¨ IEEE Transactions on Signal Processing, vol. 52, no. 4, pp. 1080-1089, April 2004. (SCI & EI) (M25-91E-01a)

41. S.-F. Lin, S.-C. Huang, F.-S. Yang, C.-W. Ku, and L.-G. Chen, ¡§Power-efficient FIR filter architecture design for wireless embedded system,¡¨ IEEE Transactions on Circuits and Systems, Part II, vol. 51, no. 1, pp. 21-25, January 2004. (SCI & EI) (T06-88D-36a)

42. P.-J. Lee and L.-G. Chen, ¡§Error concealment algorithm using interested direction for JPEG 2000 image transmission,¡¨ IEEE Transactions on Consumer Electronics, vol. 49, no. 4, pp. 1395-1401, November 2003. (SCI & EI) ( )

43. S.-F. Lin, Y.-L. Chang, and L.-G. Chen, ¡§Motion adaptive interpolation with horizontal motion detection for deinterlacing,¡¨ IEEE Transactions on Consumer Electronics, vol. 49, no. 4, pp. 1256-1265, November 2003. (SCI & EI) ()

44. S.-Y. Chien, Y.-W. Huang, and L.-G. Chen, ¡§Predictive watershed a fast watershed algorithm for video segmentation,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 5, pp. 453-461, May 2003. (SCI & EI) ()

45. C.-J. Lian, K.-F. Chen, H.-H. Chen, and L.-G. Chen, ¡§Analysis and architecture design of block coding engine for EBCOT in JPEG-2000,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 3, pp. 219-230, March 2003. (SCI & EI) (S35-90A-55a, TSMC 0.35)

46. C.-J. Lian, Z.-L. Yang, H.-C. Chang, and L.-G. Chen, ¡§Hardware-efficient architecture design for zerotree coding in MPEG-4 still texture coder,¡¨ IEICE Transactions on Fundamentals of Electronics, Communications and Computer Science, vol. E86-A, no. 2, pp. 472¡V479, February 2003. (SCI & EI) (S35-91C-09a, S35-91C-11a, S35-90C-34a, TSMC 0.35)

47. Y.-W. Huang, S.-Y. Ma, C.-F. Shen, and L.-G. Chen, ¡§Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 1, pp. 111-117, January 2003. (SCI & EI) (S35-91C-09a, S35-91C-11a, S35-90C-34a, TSMC 0.35)

48. T.-C. Wang, H.-C. Fang and L.-G. Chen, ¡§Low delay and error robust wireless video transmission architecture for video communications,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 12, no. 12, pp. 1049-1058, December 2002. (SCI & EI)

49. S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, ¡§Efficient moving object segmentation algorithm using background registration technique,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 12, no. 7, pp. 577-586, July 2002. (SCI & EI)

50. H.-C. Chang, Y.-C. Wang, W.-M. Chao, and L.-G. Chen, ¡§VLSI architecture design of MPEG-4 shape coding,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 12, no. 9, pp. 741-751, September 2002. (SCI & EI)

51. C.-K. Chen, P.-C. Tseng, Y.-C. Chang, and L.-G. Chen, ¡§A digital signal processor with programmable correlator array architecture for 3rd generation wireless communication system,¡¨ IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 48, no. 12, pp. 1-11, December 2001. (SCI & EI)

52. P.-C. Tseng, C.-K. Chen, and L.-G. Chen, ¡§CDSP: an application-specific digital signal processor for third generation wireless communications,¡¨ IEEE Transactions on Consumer Electronics, vol. 47, no. 3, pp. 672-677, August 2001. (SCI & EI)

53. T.-H. Tsai, R.-J. Wu, and L.-G. Chen, ¡§A cost-effective design for MPEG-2 audio decoder with embedded RISC core,¡¨ Journal of VLSI Signal Processing, vol. 29, pp. 255-265, November 2001. (SCI & EI)

54. J.-F. Shen, T.-C. Wang, and L.-G. Chen, ¡§A novel low-power full search block-matching motion estimation design for H.263+,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 11, no. 7, pp. 890-897, July 2001. (SCI & EI)

55. P.-C. Wu and L.-G. Chen, ¡§An efficient architecture for two-dimensional discrete wavelet transform,¡¨ IEEE Transactions On Circuits and Systems for Video Technology, vol. 11, no. 4, pp. 536-545, April 2001. (SCI & EI)

56. C.-Y. Chen, Z.-L. Yang, T.-C. Wang, and L.-G. Chen, ¡§A programmable parallel VLSI architecture for 2D discrete wavelet transform,¡¨ Journal of VLSI Signal Processing, vol. 28, pp. 151-163, July 2001. (SCI & EI)

57. H.-C. Chang, J.-Y. Jiu, L.-L. Chen, and, L.-G. Chen, ¡§A low power 8 ¡Ñ 8 direct 2-D DCT chip design,¡¨ Journal of VLSI Signal Processing, vol. 26, pp. 319-332, November 2000. (SCI & EI)

58. R.-X. Chen, L.-G. Chen, and L.-Chen, ¡§System design consideration for digital wheelchair controller,¡¨ IEEE Transactions on Industrial Electronics, vol. 47, no. 4, pp. 898-907, August 2000. (SCI & EI)

59. T.-H. Tsai and L.-G. Chen, ¡§A novel architecture of inverse quantization and multichannel processing for MPEG-2 audio decoding,¡¨ IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 1, pp. 75-78, January 2000. (SCI & EI)

60. S.-Y. Ma and L.-G. Chen, ¡§A single chip CMOS APS camera with direct frame difference output,¡¨ IEEE Journal of Solid-State Circuits, vol. 34, no. 10, October 1999. (SCI & EI)

61. S.-C. Huang and L.-G. Chen, ¡§A log-exp still image compression chip design,¡¨ IEEE Transactions On Consumer Electronics, pp. 812-819, August 1999. (SCI & EI)

62. Y.-C. Liu, Y.-K. Lai, T.-H. Tsai, P.-C. Wu, and L.-G. Chen, ¡§VLSI implementation of visual block pattern truncation coding,¡¨ IEEE Transactions on Consumer Electronics, vol. 44, no. 3, pp. 490-499, August 1998. (SCI & EI)

63. Y.-K. Lai, Y.-L. Lai, Y.-C. Liu, P.-C. Wu, and L.-G. Chen, ¡§VLSI implementation of the motion estimator with two-dimensional data-reuse,¡¨ IEEE Transactions on Consumer Electronics, vol. 44, no. 3, pp. 623-629, August 1998. (SCI & EI)

64. Y.-K. Lai and L.-G. Chen, ¡§A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 2, pp. 124-127, April 1998. (SCI & EI)

65. P.-C. Wu, L.-G. Chen, and Y.-K. Lai, ¡§A block shifting method for reduction of blocking effects in subband/wavelet image coding,¡¨ IEEE Transactions on Consumer Electronics, vol. 44, no. 1, pp. 170-177, February 1998. (SCI & EI)

66. Y.-W. Chen, L.-G. Chen, and M.-J. Chen, ¡§Jointly optimal region-classified adaptive vector quantization for very low bit rate video coding,¡¨ Journal of VLSI Signal Processing, vol. 17, pp. 189-200, November 1997. (SCI &EI)

67. M.-J. Chen, L.-G. Chen, and R.-M. Weng, ¡§Error concealment of lost motion vectors with overlapped motion compensation,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 7, no. 3, pp. 560-563, June 1997. (SCI & EI)

68. Y.-P Lee, T.-H. Chen, L.-G. Chen, and M.-J. Chen, ¡§A cost effective architecture for 8x8 2D DCT/IDCT using direct method,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 7, no. 3, pp. 560-563, June 1997. (SCI & EI)

69. R.-X. Chen, L.-G. Chen, M.-J. Chen, and T.-H. Tsai, ¡§An I-phone system design and implementation with a portable speech coding coprocessor,¡¨ IEEE Transactions on Consumer Electronics, vol. 43, no. 4, pp. 1262-1269, November 1997. (SCI & EI)

70. T.-H. Tsai and L.-G. Chen, ¡§MPEG-2 audio decoder, data arrangement and memory configuration,¡¨ IEEE Transactions on Consumer Electronics, vol. 43, no.3, pp. 598-604, August 1997. (SCI & EI)

71. C.-T. Chen, L.-G. Chen, and J.-H. Hsiao, ¡§A bit-level pipelined VLSI architecture for the running order algorithm,¡¨ IEEE Transactions Signal Processing, vol. 45, no. 8, pp. 2140-2144, August 1997. (SCI & EI)

72. C.-T. Chen, L.-G. Chen, and J.-H. Hsiao, "VLSI implementation of a selective median filter", IEEE Transactions on Consumer Electronics, Vol. 42, No. 1, pp.33-42, February 1996. (SCI & EI)

73. M.-H. Chao, W.-T. Lee, M.-C. Lin, and L.-G. Chen, ¡§IC design of an adaptive Viterbi decoder,¡¨ IEEE Transactions on Consumer Electronics, vol. 42, no. 1, pp. 52-62, February 1996. (SCI & EI)

74. C.-W. Ku, L.-G. Chen, C.-H. Chen, C.-Y. Chiu, and C.-T. Huang, ¡§Investigation of a visual telephone prototyping on personal computers,¡¨ IEEE Transactions on Consumer Electronics, vol. 42, no. 3, pp. 750-759, February 1996. (SCI & EI)

75. Y.-K. Lai, L.-G. Chen, H.-T. Chen, M.-J. Chen, Y.-P Lee, and P.-C. Wu, ¡§A novel video signal processor with programmable data arrangement and efficient memory configuration,¡¨ IEEE Transactions on Consumer Electronics, vol. 42, no. 3, pp. 526-534, August 1996. (SCI & EI)

76. H.-T. Chen and L.-G. Chen, ¡§A multimedia conference system: using region based hybrid coding,¡¨ IEEE Transactions on Consumer Electronics, Aug. 1996 (SCI & EI)

77. J. H. Hsiao, L. G. Chen, and C. T. Chen, ¡§Efficient and cascadable linear array design for odd number discrete cosine transform,¡¨ IEE Proceedings on Circuits, Devices and Systems. (SCI & EI)

78. C.-T. Chen and L.-G. Chen, ¡§A novel architecture for Lempel-Ziv-based data compression,¡¨ IEEE Transactions on Consumer Electronics, August 1996 (SCI & EI)

79. S.-C. Huang, T.-H. Chen, and L.-G. Chen, ¡§A 32-bit logarithmic number system processor,¡¨ Journal of VLSI Signal Processing, vol. 14, no. 3, pp. 311-319, December 1996. (SCI & EI)

80. L.-G. Chen, M.-J. Chen, K.-N. Cheng, and M.-C. Chen, ¡§Efficient hybrid tree/linear array architecture for block-matching motion estimation algorithms,¡¨ IEE Proceedings on Vision, Image and Signal Processing, vol. 143, no. 4, pp. 217-222, August 1996. (SCI & EI)

81. P.-C. Wu, L.-G. Chen, and T.-D. Chiueh, ¡§Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol.6, no. 4, pp. 407-411, August 1996. (SCI & EI)

82. T.-H. Chen, Y.-P. Lee, and L.-G. Chen, ¡§Concurrent error detection in array multipliers by BIDO,¡¨ IEE proceeding on Computer and Digital Technology, vol. 142, no.6, pp. 425-430, November 1995. (SCI)

83. W.-T. Lee, M.-H. Chan, L.-G. Chen, and M.-C. Lin, ¡§A signal-chip Viterbi decoder for a binary convolutional code using an adaptive algorithm,¡¨ IEEE Transactions Consumer Electronics, vol. 41, no. 1, pp. 150-159, February 1995. (SCI & EI)

84. T.-H. Tsai, T.-H. Chen, and L.-G. Chen, ¡§An MPEG audio decoder chip,¡¨ IEEE Transactions Consumer Electronics, vol. 41, no. 1, pp. 89-96, February 1995. (SCI & EI)

85. L.-G. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§Pipeline interleaving design for FIR, IIR, and FFT array processors,¡¨ Journal of VLSI Signal Processing, vol. 10, pp. 275-293, 1995. (SCI & EI)

86. J.-H. Hsiao, L.-G. Chen, T.-D. Chiueh, and C.-T. Chen, ¡§High throughput CORDIC-based systolic array design for the discrete cosine transform,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 5, no. 3, pp. 218-225, June 1995. (SCI & EI)

87. M.-J. Chen, L.-G. Chen, T.-D. Chiueh, and Y.-P. Lee, ¡§A new block-matching criterion for motion estimation and its implementation,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 5, no. 3, pp. 231-236, June 1995. (SCI & EI)

88. T.-D. Chiueh, T.-T. Tang, and L.-G. Chen, ¡§Vector-quantization using tree-structured self-organizing feature maps,¡¨ IEEE Journal on Selected Areas in Communications, vol. 12, no.9, pp. 1594-1599, December 1994. (SCI & EI)

89. M.-J. Chen, L.-G. Chen, T.-D. Chiueh, and Y.-P. Lee, ¡§One-dimensional full search motion estimation algorithm for video coding,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol.4, no. 5, pp. 504-509, October 1994. (SCI & EI)

90. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§Parallel architectures for 3-step hierarchical search block-matching algorithm,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 4, no. 4, pp. 407-416, August 1994. (SCI & EI)

91. L.-G. Jeng and L.-G. Chen, ¡§Rate-optimal DSP synthesis by pipeline and minimum unfolding,¡¨ IEEE Transactions on VLSI Systems, vol. 2, no. 1, pp. 81-88, March 1994. (EI)

92. L.-G. Chen and Y.-C. Liu, ¡§A high quality MC-OBTC codec for video signal processing,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 4, no. 1, pp. 92-98, February 1994. (SCI & EI)

93. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§Accuracy improvement and cost reduction of 3-step search block-matching algorithm for video coding,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 4, no. 1, pp. 88-90, February 1994. (SCI & EI)

94. D.-I. Bai, L.-G. Chen, and L.-G. Jeng, ¡§A graphical block-diagram based programming environment for a DSP silicon compiler,¡¨ IEE Proceedings-G, Circuits, Devices and Systems, vol. 140, no. 5, pp. 313-318, October 1993. (SCI)

95. C.-W. Ku, L.-G. Chen, T.-D. Chiueh, and D.-L. Huang, ¡§Cache vector quantization algorithm in video compression,¡¨ IEE Electronics Letters, vol. 29, no. 6, pp. 1423-1424, August 1993. (SCI)

96. L.-G. Chen, Y.-C. Liu, T.-D. Chiueh, and Y.-P. Lee, ¡§A real-time video processing chip,¡¨ IEEE Transactions on Consumer Electronics, vol. 39, no. 2, pp. 82-92, May 1993. (SCI & EI)

97. T.-H. Chen and L.-G. Chen, ¡§Concurrent error-detectable butterfly chip for real-time FFT processing through time redundancy,¡¨ IEEE Journal of Solid-State Circuits, vol. 28, no. 5, pp. 537-547, May 1993. (SCI & EI)

98. Y.-S. Jehng, L.-G. Chen, and T.-D. Chiueh, ¡§An efficient and simple VLSI tree architecture for motion estimation algorithms,¡¨ IEEE Transactions on Signal Processing, vol. 41, no. 2, pp. 889-900, February 1993. (SCI & EI)

99. Y.-S. Jehng, L.-G. Chen, and T.-D. Chiueh, ¡§A motion estimator for low bit-rate video codec,¡¨ IEEE Transactions on Consumer Electronics, vol. 38, no. 2, pp. 60-69, May 1992. (SCI & EI)

100. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§A ROM-based special purpose multiplication and its applications,¡¨ IEE Electronics Letters, vol. 28, no. 8, pp. 718-720, April 1992. (SCI)

101. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§DCT-based interframe coding for video codec,¡¨ IEE Electronics Letters, vol. 28, no. 4, pp. 411-413, February 1992. (SCI)

102. L.-G. Jeng and L.-G. Chen, ¡§Rate-optimal static schedule for recursive DSP algorithms by retiming and unfolding,¡¨ International Journal of Electronics, vol. 73, no. 4, pp. 687-701, 1992. (SCI & EI)

103. T.-H. Chen, L.-G. Chen, and Y.-S. Jehng, ¡§Design and analysis of VLSI-based arithmetic arrays with error correction,¡¨ International Journal of Electronics, vol. 72, no.2, pp. 253-271, April 1992. (SCI & EI)

104. L.-G. Chen, W.-T. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§An efficient parallel motion estimation algorithm for digital image processing,¡¨ IEEE Transactions on Circuits and Systems for Video Technology, vol. 1, no. 4, pp. 378-385, December 1991. (SCI & EI)

105. L.-G. Chen and T.-H. Chen, ¡§Fault-tolerant serial-parallel multiplier,¡¨ IEE Proceeding, Pt. E., vol. 138, no. 4, pp. 276-280, July 1991. (SCI)

106. Y.-S. Jehng, L.-G. Chen, and T.-M. Parng, ¡§ASG: automatic schematic generator,¡¨ INTEGRATION, the VLSI Journal, vol. 11, no. 1, pp. 11-27, March 1991. (SCI & EI)

107. L.-G. Chen, J.-Y. Lee, and J.-F. Wang, ¡§Hierarchical functional verification for cell-based design styles,¡¨ IEE Proceedings, Pt. G., vol. 134, no. 2, pp. 103-109, April 1987. (SCI)

108. L.-G. Chen, R.-J. Huang, J.-F. Wang, and J.-Y. Lee, ¡§An interactive net connectivity check strategy,¡¨ IEEE Transactions on Circuits and Systems, vol. CAS-34, no. 9, pp. 1135-1137, September 1987. (SCI & EI)

109. L.-G. Chen, J.-Y. Lee, J.-F. Wang, and K.-T. Chen, ¡§Fast execution for circuit consistency verification,¡¨ INTEGRATION, the VLSI Journal, vol. 4, no. 3, pp. 239-262, 1986. (SCI & EI)

110. L.-G. Chen, C.-Y. Chang, Y.-K. Su, and T.-S. Wu, ¡§Numerical analysis of an injection laser with stripe geometry,¡¨ Optics and Lasers in Engineering, vol. 4, pp. 195-202, 1983. (SCI & EI)

111. C.-Y. Chang, Y.-K. Su, M.-K. Lee, L.-G. Chen, and M.-P. Houng, ¡§Characterization of GaAs epitaxial layers by low pressure MOVPE using TEG as Ga source,¡¨ Journal of Crystal Growth, vol. 55, no. 1, pp. 24-29, October 1981. (SCI)

¡@

¡@

II. Local Journal

¡@

1. H.-M. Jong, L.-G. Chen and T.-D. Chiueh, ¡§Analysis and implementation of 2-D discrete cosine transform chip,¡¨ on Bulletin of the College of Engineering, NTU.

2. L.-G. Chen, L.-G. Jeng, and K.-T. Tsao, ¡§Language System for DSP Silicon Compiler,¡¨ Proceedings of the National Science Council, Part. A., vol. 16, no.5, pp. 374-382, September 1992.

3. L.-G. Chen and C.-T. Chao, ¡§Intelligent digital filter synthesis system,¡¨ Journal of Chinese Institute of Engineers, vol. 16, no. 1, pp. 117-133, January 1993.

4. L.-G. Chen, T.-J. Lin, and L.-G. Jeng, ¡§Application-specific chip design using behavioral silicon compiler,¡¨ Journal of Chinese Institute of Engineers, vol. 17, no. 1, pp.107-112, 1994.

(B) Books

1. L.-G. Chen, L.-G. Jeng, K.-T. Chao, D.-J. Lin, and C.-T. Chao, ¡§CAD system for an application-specific DSP processor design,¡¨ in Section: CAD for DSP of VLSI Logic Synthesis and Design, ISBN90-51990460, Edited by Robert W. Dutton, IOS Press, Netherlands, 1991.

2. Y.-S. Jehng, L.-G. Chen, T.-D. Chiueh, W. Chen, and H.-M. Jong, ¡§Pipeline interleaving design for FIR, IIR, and FFT,¡¨ in Section: CAD for DSP of VLSI Logic Synthesis and Design, ISBN90-51990460, Edited by Robert W. Dutton, IOS Press, Netherlands, 1991.

3. T.-A. Michel, and L.-G. Chen, ¡§A real-time decoder for the scene adaptive video coding system,¡¨ AT\&T Bell 11224-941014-01TM, Work Project No. 311402-2399, File case 38794-43, Technical Memorandum, 1994.

4. L.-G. Chen and C.-W. Ku, ¡§Multimedia visual telephone system,¡¨ chapter in the book ¡§Multimedia Technology for Applications¡¨ edited by B. Sheu and M. Ismail, IEEE Press, 1997.

5. C.-W. Ku, F.-Y. Kuo, L.-G. Chen and C.-K. Chen, ¡§Low powered multi-code correlator for IMT-2000,¡¨ Chapter in the book ¡§Wireless Communication Systems¡¨ edited by Raymond Steele, John Wiley published, 1999.

6. ¡§1998 IEEE Workshop on Signal Processing Systems (SiPS¡¦98)-Design and Implementation¡¨ edited by E. S. Monolakos, A. Chandrakasan, L.-G. Chen, W. P. Burleson, and K. Konstantinides, IEEE Press, 1998. ISBN: 0-7803-4997-0

7. ¡§1999 IEEE Workshop on Signal Processing Systems (SiPS¡¦99)-Design and Implementation¡¨ edited by L.-G. Chen, H.-M. Hang, and I. Kuroda, IEEE Press, 1999. ISBN: 0-7803-5650-0

8. ¡§VLSI DESIGN OF WAVELET TRANSFORM, Analysis, Architecture, and Design Examples,¡¨ by Liang-Gee Chen, Chao-Tsung Huang, Ching-Yeh Chen & Chih-Chi Cheng, ISBN 978-1-86094-673-8, Dec. 2006 (Imperial College Press)

(C) Book Chapter

1. ¡§Essential Issues in SOC Design, Designing Complex Systems-on-Chip,¡¨ Lin, Youn-Long Steve (Ed.), ISBN-10: 1-4020-5351-7, 2007 (Springer)

2. ¡§Chapter 3: Multimedia IP Development ¡V Image and Video Codecs¡¨ by Liang-Gee Chen, Chung-Jr Lian, Ching-Yeh Chen, and Tung-Chien Chen

(D) Patents

1. ³¯¨}°ò, ¿à¥Ã±d, ¼B»·ºÕ, §õ¥ÃÙy, ¡§°w¹ï¤T¨BÆJ¶¥·j´M°Ï¶ô¤ñ¹ïºtºâªk¤§¸ê®ÆÀô°}¦C¬[ºc,¡¨ no. 102678, Taiwan ROC, 1999.05.01- 2017.09.04

2. ³¯¨}°ò, ½²©vº~, §d¤¯´¼, ¡§¦b¤@¹q¸£¨t²Î¤¤¹ï¤@¦r½X¸Ñ¸s²Õªº¤èªk,¡¨ no. 107015, Taiwan ROC, 1999.08.11- 2018.04.29

3. ³¯¨}°ò, ¿à¥Ã±d, §õ¥ÃÙy, ¡§À³¥Î¤T¨BÆJ¶¥¼h¦¡·j´M°Ï¶ô¤ñ¹ïªk¤§²¾°Ê¦ôp¾¹,¡¨ no. 110352, Taiwan ROC, 1999.12.11- 2018.05.20

4. ³¯¨}°ò, ½²©vº~, ¡§©óMPEG-IIµÀW°T¸¹¸Ñ½X¤¤¦X¦¨¦¸ÀW±aÂoªi¾¹ªº¤èªk,¡¨ no. 110857, Taiwan ROC, 2000.01.01- 2018.07.31

5. ¼B²`²W, ·¨²M²W, ³¯¨}°ò, ¡§°ªÀW¤¬¸É¦¡ª÷®ñ¥bÂù¼Ò\¦h¼Ò«e¸m¤ÀÀW¾¹,¡¨ no. 114359, Taiwan ROC, 2000.04.11- 2016.09.22

6. ³¯¨}°ò, §õ¥ÃÙy, ÅU¤¤«Â, ¼B»·ºÕ, ¡§§Q¥Îª½±µ¦¡ªº°ª¿é¥X¶q»P°ª«×³W«hªº¤Gºû¢·¼¢·Â÷´²¾l©¶Âà´«¡þ¤ÏÂ÷´²¾l©¶Âà´«¤§¬[ºc,¡¨ no. 118022, Taiwan ROC, 2000.06.21- 2018.03.02

7. ³¯¨}°ò, °¨¥K¼Ý, ¡§¢Ñ¢Û¢Ý¢á¥D°Ê¹³¯À·PÀ³¾¹¡¨, no. 117230, Taiwan ROC, 2000.07.01- 2018.12.13

8. ³¯¨}°ò, ¼B»·ºÕ, §õ¥ÃÙy, §d¬f¦¨, ³¯¦°ªF, "©ó¤@¹q¸£¨t²Î¤¤À£ÁY±m¦â¹Ï¹³¤Î««Ø³QÀ£ÁY±m¦â¹Ï¹³ªº¤èªk", no. 122435, Taiwan ROC, 2000.11.01- 2019.02.23

9. ³¯¨}°ò, ½²©vº~, ¡§¾A¥Î©óMPEG-IIµÀW°T¸¹¸Ñ½X¤§°f¶q¤Æ»P¦hÁn¹D³B²z¤§µwÅé¬[ºc¤Î²Õ¦¨,¡¨ no. 102678, Taiwan ROC, 2001.03.06- 2018.08.03

10. ³¯¨}°ò, §d¬f¦¨, ¡§¾A¥Î©ó¤GºûÂ÷´²ªi¤¸Âà´«¤§µwÅé¬[ºc,¡¨ Taiwan ROC, 2002

11. ³¯¨}°ò, °¨¥K¶h, ²»à¶h, ¡§±q¤@¨t¦Cµø°Tµe±¤Á³Î¨ä¤¤²¾°Êª«¥ó§Îª¬ªº¤èªk,¡¨ no. 175447, Taiwan ROC, 2003

12. ³¯¨}°ò, ¶À·¶¤å, ²»à¶h, ¡§¥Î©ó²¾°Ê¦ôpªº¥þ°ì®ø°£ºtºâªk¤Î¨äµwÅé¬[ºc³]p,¡¨ no. 177013, Taiwan ROC, 2003.04.01- 2022.04.11

13. ³¯¨}°ò, ¤ý«×´¼, ¡§³æ¤@¥iÅܪø«×½s½X¾¹¬[ºc,¡¨ no. 184663, Taiwan ROC, 2003.08.21- 2021.11.05

14. ³¯¨}°ò, ¶À´Â©v, ´¿³Õ§Ó, ¡§¥Î©ó´£ª@¦¡Â÷´²¤pªiÂà´«µwÅé¹ê²{¤§Â½Âডºtºâªk¤Î¨äµwÅé¬[ºc,¡¨ no. 200668, Taiwan ROC, 2004.04.01 - 2022.07.11.

15. ³¯¨}°ò, ªL¥@Â×, ¡§¥|¹Ï³õ°Ê¹³½Õ¾A©Ê¸Ñ¥æ¿ù,¡¨ Taiwan ROC, 2004.12.01-2023.05.15

16. ³¯¨}°ò, ±i·¶Åï, ¡§¥þ°ì¤Î§½³¡¾AÀ³©Ê¹Ï³õ¥h¥æ¿ù¨t²Î»P¤èªk,¡¨ Taiwan ROC, 2005.06.11-2023.12.18

17. ³¯¨}°ò, ¤è¥°¦N, ±i¨|Þ³, ¡§¥¦æ¤Æ´O¤J¦¡¤è¶ô½s½X¾¹¤Î¨ä½s½X¤èªk,¡¨ Taiwan ROC, 2005.12.21-2023.11.13

18. ³¯¨}°ò, ¤è¥°¦N, ±i¨|Þ³, ¡§¤@ºØ¥Î©ó¢Ø¢Þ¢Ó¢Õ¢±¢¯¢¯¢¯¤¤ªº«eÀ£ÁY¦ì¤¸-¥¢¯u³Ì¨Î¤Æ¤èªk,¡¨ Taiwan ROC, 2007.10.11-2024.07.12

19. ³¯¨}°ò, ¶À´Â©v, ³¯¼y¾ç, ³¯Öö»¨, ¡§¥Î©ó²¾°Ê¦ôpªºµ¥¯ÅC¡Ï¸ê®Æ«ÂШϥά[ºc/ Level C+ Data Reuse Scheme for Motion Estimation,¡¨ ¤¤µØ¥Á°ê±M§Q I272548, 2007.02.01-2025.08.21

20. C.-Y. Yang, S.-I. Liu, and L.-G. Chen, ¡§High-frequency CMOS dual/multi modules prescaler,¡¨ US. 6,094,466, 2000.07.25- 2017.01.10

21. L.-G. Chen, Y.-K. Lai, Y.-C. Liu, and Y.-P. Lee, ¡§Array architecture with data-rings for 3-step hierarchical search block matching algorithm,¡¨ US. 6,118,901, 2000.09.12- 2017.10.31

22. L.-G. Chen, Y.-C. Liu, Y.-P. Lee, P.-C. Wu, and H.-T. Chen, ¡§Methods for compressing and re-constructing a color image in a computer system,¡¨ US. 6,151,409, 2000.11.21- 2018.03.13

23. L.-G. Chen, Y.-K. Lai, and Y.-P. Lee, ¡§Motion estimator employing a three-step hierarchical search block-matching algorithm,¡¨ US. 6,160,850, 2000.12.12- 2018.08.03

24. L.-G. Chen and T.-H. Tsai, ¡§Architecture for inverse quantization and multichannel processing in MPEG-II audio decoding,¡¨ US. 6,166,663, 2000.12.26- 2019.07.16

25. Chen; Liang-Gee, Tsai; Tsung-Han, Liu; Yuan-Chen, ¡§Synthesis subband filter in MPEG-II audio decoding,¡¨ US. 6,199,039, 2001

26. L.-G. Chen and S.-Y. Ma, ¡§CMOS active pixel sensor,¡¨ US. 6,215,113, 2001.04.10- 2019.04.22

27. Chen; Liang-Gee, Tsai; Tsung-Han, Wu; Ren-Jr, ¡§Method of degrouping a codeword in MPEG-II audio decoding by iterative addition and subtraction,¡¨ US. 6370501, 2002

28. L.-G. Chen and T.-C. Wang, ¡§Universal variable code (UVLC) encoder architecture,¡¨ US. 6,542,095B1, 2003.04.01- 2021.12.13

29. Chen; Liang-Gee, Wu; Po-Cheng, Liu; Yuan-Chen, Lai; Yeong-Kang, ¡§Architecture for performing two-dimensional discrete wavelet transform,¡¨ US. 6,587,589, 2003

30. Chen; Liang-Gee, Huang; Chao-Tsung, Tseng; Po-Chih, ¡§Flipping algorithm to architectures of hardware realization for lifting-based DWT,¡¨ US. 7,076,515, 2006

31. Chen; Liang-Gee, Lin; Shyh-Feng, Chou; Patrick, Chang; Yu-Lin, Chen; Ryan, ¡§Four-field motion adaptive de-interlacing,¡¨ US. 7,129,989, 2006

(E) Conference Papers

I. International Conference

1. Y.-K. Su, C.-Y. Chang, T.-S. Wu, M.-K. Lee, M.-P. Houng, and L.-G. Chen, ¡§Growth and properties of GaP/Si devices by MOCVD,¡¨ in Proceedings of the 8^th International Conference on CVD, Germany, pp. 387-392, 1981.

2. L.-G. Chen, J.-Y. Lee, K.-T. Chen, and J.-F. Wang, ¡§An algorithm for verifying circuit connectivity of VLSI,¡¨ in Proceedings of International Devices and Materials Symposium, ROC, pp. 271-275, 1984.

3. K.-T. Chen, L.-G. Chen, J.-Y. Lee, and J.-F. Wang, ¡§Logic synthesis for CMOS and NMOS VLSI circuits,¡¨ in Proceedings of International Devices and Materials Symposium, ROC, pp.277-279, 1984.

4. L.-G. Chen, J.-Y. Lee, K.-T. Chen, and J.-F. Wang, ¡§A new comparison algorithm for verifying logic interconnection of VLSI,¡¨ in Proceedings of 1985 IEEE International Symposium on Circuits and Systems (ISCAS¡¦85), pp.451-454, Japan, 1985.

5. L.-G. Chen, J.-F. Wang, J.-Y. Lee, and H.-T. Lee, ¡§A hierarchical filter for circuit layout,¡¨ in Proceedings of 1986 IEEE of International Symposium on Circuits and Systems (ISCAS¡¦86), pp. 329-330, San Jose, May 1986.

6. L.-G. Chen and M.-S. Guo, ¡§How expert system aids aerial photographic interpretation,¡¨ in Proceedings of International Computer Symposium (ICS'88), pp. 490-495, Taipei, December 1988.

7. L.-G. Chen and T.-H. Chen, ¡§RECO: a novel circuit design for concurrent error detection,¡¨ in Proceedings of Second International Conference on Solid State and Integrated Circuit Technology (ICSICT'89), Beijing, 1989.

8. L.-G. Chen and T.-H. Chen, ¡§Computation with simultaneously concurrent error detection using bi-directional operands,¡¨ in Proceedings of 1989 IEEE International Conference on Computer Design (ICCD¡¦89), pp. 128-131, Boston, October 1989.

9. L.-G. Chen and T.-H. Chen, ¡§An error detectable FFT processor¡¨, in Proceedings of ISMM Computer Applications on Design, Simulation, and Analysis, New Orleans, March 1990.

10. Y.-S. Jehng, L.-G. Chen, and T.-D. Chiueh, ¡§Low latency tree architectures for motion estimation algorithms,¡¨ in Proceeding of IASTED International Symposium on Adaptive Control and Signal Processing, pp. 52-55, New York, USA, October 1990.

11. L.-G. Chen, L.-G. Jeng, K.-T. Chao, D.-J. Lin, and C.-T. Chao, ¡§CAD system for an application-specific DSP processor design,¡¨ in Proceedings of 90-SASIMI Synthesis and Simulation Meeting and International Interchange, pp. 199-206, Kyoto, Japan, October 1990.

12. Y.-S. Jehng, L.-G. Chen, T.-D. Chiueh, W. Chen, and H.-M. Jong, ¡§Pipeline interleaving design for FIR, IIR, and FFT,¡¨ in Proceedings of 90-SASIMI Synthesis and Simulation Meeting and International Interchange, pp. 207-214, Kyoto, Japan, October 1990.

13. L.-G. Chen, Y.-S. Jehng, T.-M. Parng, ¡§Automatic schematic environment for CAD frameworks,¡¨ in Proceedings of 1990 International Electronic Devices and Materials Symposium, pp. 502-505, Hsinchu, ROC, November 1990.

14. L.-G. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§Array architecture design for video communication applications,¡¨ in Proceedings of International Computer Symposium, pp.272-277, Hsinchu, ROC, December 1990.

15. C.-Y. Kuo, L.-G. Chen, and T.-M. Parng, ¡§A new approach to CMOS operational amplifier synthesis,¡¨ in Proceedings of International Computer Symposium, pp. 699-704, Hsinchu, ROC, December 1990.

16. C.-Y. Kuo, L.-G. Chen, and T.-M. Parng, ¡§An automatic synthesizer for CMOS operational amplifiers,¡¨ in Proceedings of Europe Design Automation Conference (EDAC), pp. 470-474, Netherlands, February 1991.

17. L.-G. Jeng and L.-G. Chen, ¡§A globally static rate optimal scheduling for recursive DSP algorithms,¡¨ in Proceedings of 1991 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP¡¦91), pp. 1005-1008, Toronto, May 1991.

18. L.-G. Chen and L.-G. Jeng, ¡§Optimal module set and clock cycle selection for DSP synthesis,¡¨ in Proceedings of 1991 IEEE International Conference on Circuits and Systems (ISCAS¡¦91), pp. 2200-2203, Singapore, June 1991.

19. L.-G. Chen, W.-T. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§An efficient parallel motion estimation algorithm for digital image processing,¡¨ in Proceedings of 1991 IEEE International Conference on Circuits and Systems (ISCAS¡¦91), pp. 670-673, Singapore, June 1991.

20. L.-G. Chen and T.-H. Chen, ¡§A concurrent error-detectable module design for FFT processing,¡¨ in Proceedings of 1991 CHINA International Conference on Circuits and Systems, pp. 839-842, Shenzhen, June 1991.

21. L.-G. Chen, W.-T. Chen, and T.-D. Chiueh, ¡§A predictive parallel motion estimation algorithm for digital image processing,¡¨ in Proceedings of 1991 IEEE International Conference on Computer Design (ICCD¡¦91), pp. 617-620, Boston, October 1991.

22. T.-H. Chen, L.-G. Chen, and Y.-S. Jehng, ¡§The chip design for fault-tolerant FFT processor,¡¨ in Proceedings of 1991 International Symposium on Communications, Tainan, December 1991.

23. D.-J. Lin and L.-G. Chen, ¡§On design of DSP chips using behavioral silicon compiler,¡¨ in Proceedings of 1991 International Symposium on Communications, Tainan, December 1991.

24. C.-T. Chao and L.-G. Chen, ¡§Intelligent digital filter synthesis system,¡¨ in Proceedings of 1991 International Symposium on Communications, Tainan, December 1991.

25. T.-H. Chen, L.-G. Chen, and Y.-S. Jehng, ¡§A partitioning approach to design fault-tolerant arithmetic arrays,¡¨ in Proceedings of 1992 International Phenex Conference on Computer and Communication (IPCCC¡¦91), pp. 432-439, Arizona, April 1992.

26. Y.-S. Jehng and L.-G. Chen, ¡§Realization of array architecture for video compression algorithms,¡¨ in Proceedings of 1992 IEEE International Symposium on Circuits and Systems (ISCAS¡¦92), San Diego, May 1992.

27. Y.-S. Jehng, L.-G. Chen, and T.-D. Chiueh, ¡§A motion estimator for low bit-rate video codec,¡¨ in Proceedings of 1992 International Conference on Microwave and Communication (ICMC¡¦92), Nanjing, June 1992.

28. W.-T. Lee, Y.-P. Lee, L.-G. Chen, and M.-C. Lin, ¡§The implementation of viterbi decoder with adaptive algorithm,¡¨ in Proceedings of 1992 International Conference on Microwave and Communication (ICMC¡¦92), Nanjing, June 1992.

29. T.-H. Chen, L.-G. Chen, and Y.-S. Chang, ¡§Design of concurrent error-detectable VLSI-based array dividers,¡¨ in Proceedings of 1992 IEEE International Conference on Computer Design (ICCD¡¦92), Boston, October 1992.

30. L.-G. Chen, Y.-C. Liu, and T.-D. Chiueh, ¡§Video data compression using an efficient BTC based system,¡¨ in Proceedings of 1992 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS¡¦92), Sydney, December 1992.

31. L.-G. Jeng and L.-G. Chen, ¡§Rate-optimal DSP synthesis by pipeline and minimum unfolding,¡¨ in Proceedings of 6th International Conference on VLSI Design, pp.148-153, India, January 1993.

32. J.-H. Hsiao, L.-G. Chen, T.-D. Chiueh, and C.-T. Chen, "Novel systolic array design for the discrete Hartley transform with high throughput rate,¡¨ in Proceedings of 1993 IEEE International Symposium on Circuits and Systems (ISCAS¡¦93), pp. 1567-1570, Chicago , May 1993.

33. P. Chen, J.-M. Shyu, and L.-G. Chen, ¡§Hardware verification using symbolic state transition graphs,¡¨ in Proceedings of 1993 IEEE International Conference on Computer Design (ICCD¡¦93), Boston, October 1993.

34. C.-T. Chen, L.-G. Chen, T.-D. Chiueh, and J.-H. Hsiao, ¡§An efficient pipelined VLSI implementation of rank order filter,¡¨ in Proceedings of International Symposium on Speech, Image Processing and Neural Networks (ISSIPNN¡¦94), Hong Kong, April 1994.

35. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§Modifications and performance improvements of 3-step search block-matching algorithm for video coding,¡¨ in Proceedings of International Symposium on Speech, Image Processing and Neural Networks (ISSIPNN¡¦94), Hong Kong, April 1994.

36. J.-H. HSiao, L.-G. Chen, T.-D. Chiueh, and C.-T. Chen, ¡§High throughput CORDIC-based systolic array design for discrete cosine transform,¡¨ in Proceedings of 1994 IEEE International Symposium on Circuits and Systems (ISCAS¡¦94), London, May 1994.

37. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§Parallel architectures of 3-step search block-matching algorithm for video coding,¡¨ in Proceedings of 1994 IEEE International Symposium on Circuits and Systems (ISCAS¡¦94), London, May 1994.

38. C.-W. Ku, L.-G. Chen, T.-D. Chiueh, and H.-M. Jong, ¡§Tree-structure architecture and VLSI implementation for vector quantization algorithms,¡¨ in Proceedings of 1994 IEEE International Symposium on Circuits and Systems (ISCAS¡¦94), London, May 1994.

39. S.-C. Huang, L.-G. Chen, and T.-H. Chen, ¡§The chip design of 32-b logarithm number system,¡¨ in Proceedings of 1994 IEEE International Symposium on Circuits and Systems (ISCAS¡¦94), London, May 1994.

40. L.-G. Chen, Y.-M. Chiu, T.-D. Chiueh, and H.-M. Jong, ¡§Object-oriented video coding algorithm for very low bit-rate system,¡¨ in Proceedings of Asia-Pacific Conference on Circuits and Systems, (APCCAS¡¦94), December 1994.

41. W.-T. Lee, L.-G. Chen, and T.-H. Chen, ¡§The radix-2K Viterbi decoding with transpose path metric processor,¡¨ in Proceedings of Asia-Pacific Conference on Circuits and Systems, (APCCAS¡¦94), December 1994.

42. C.-T. Chen, L.-G. Chen, T.-D. Chiueh, and J.-H. Hsiao, ¡§Design and VLSI implementation of real-time weighted median filters,¡¨ in Proceedings of Asia-Pacific Conference on Circuits and Systems (APCCAS'94), December 1994.

43. L.-G. Chen, K.-N. Cheng, M.-J. Chen, and T.-D. Chiueh, ¡§Design of a hybrid tree/linear array architecture for motion estimation,¡¨ in Proceedings of International Computer Symposium (ICS¡¦94), pp. 451-456, Taiwan, December 1994.

44. C.-T. Chen, and L.-G. Chen, and J.-H. Hsiao, ¡§VLSI implementation of a selective median filter,¡¨ in Proceedings of 1995 IEEE International Conference on Consumer Electronics (ICCE¡¦95), 1995.

45. M.-H. Chao, W.-T. Lee, M.-C. Lin, and L.-G. Chen, ¡§IC design of an adaptive Viterbi decoder,¡¨ in Proceedings of 1995 IEEE International Conference on Consumer Electronics (ICCE¡¦95), 1995.

46. C.-W. Ku, Y.-M. Chiu, and L.-G. Chen, ¡§A very low bit-rate video coding system based on optical flow and region segmentation algorithms,¡¨ in Proceedings of SPIE Visual Communication Conference, Taipei, May 1995.

47. W.-T. Lee, T.-H. Chen, and L.-G. Chen, ¡§A VLSI architecture for radix-2K Viterbi decoding with transpose algorithm,¡¨ in Proceedings of 1995 International Symposium on VLSI Technology, Systems and Applications, Taipei, May 1995.

48. T.-H. Tsai, T.-H. Chen, and L.-G. Chen, ¡§Design and VLSI implementation of MPEG audio decoder,¡¨ in Proceedings of 1995 International Symposium on VLSI Technology, Systems and Applications, Taipei, May 1995.

49. Y.-P. Lee, L.-G. Chen, and C.-W. Ku, ¡§Architecture design of MPEG-2 systems,¡¨ in Proceedings of 1995 IEEE International Conference on Consumer Electronics (ICCE¡¦95), Chicago, June 1995.

50. C.-T. Chen, L.-G. Chen, and, J.-H. Hsiao, ¡§A hardware-oriented design for weighted median filters,¡¨ in Proceedings of IFIP International Conference on Very Large Scale Integration (VLSI¡¦95), pp. 441-445, Japan, August 1995.

51. L.-G. Chen, C.-W. Ku, D.-L. Huang, and Y.-P. Lee, ¡§Algorithm and VLSI design of a feature-based classified vector quantizer for image coding,¡¨ in Proceedings of 1995 International Symposium on Communications, Taipei, Taiwan, December 1995.

52. W.-T. Lee, T.-H. Chen, and L.-G. Chen, ¡§The VLSI design of a radix-2k transpose Viterbi decoder,¡¨ in Proceeding of 1995 International Symposium on Communications (ISCOM¡¦95), Taipei, Taiwan, December 1995.

53. C.-T. Chen, L.-G. Chen, and J.-H. Hsiao, ¡§A block processing of the running order algorithm for order statistic filters,¡¨ in Proceeding of 1995 International Symposium on Communications (ISCOM¡¦95), Taipei, Taiwan, December 1995.

54. Y.-W. Chen, L.-G. Chen, and M.-J. Chen, ¡§A very low bit rate video coding system using adaptive region-classified vector quantization,¡¨ in Proceedings of 1996 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP¡¦96), May 1996, Atlanta.

55. C. W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, ¡§Building a pseudo object-oriented very low bit-rate video coding system from a modified optical flow motion estimation algorithm,¡¨ in Proceedings of 1996 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP¡¦96), May 1996, Atlanta.

56. Y.-C. Liu and L.-G. Chen, ¡§Visual pattern BTC,¡¨ in Proceedings of 1996 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP¡¦96), May 1996, Atlanta.

57. C.-W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, ¡§The arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system,¡¨ in Proceedings of 1996 IEEE International Symposium on Circuits and Systems, (ISCAS¡¦96), Atlanta, May 1996.

58. Y.-K. Lai and L.-G. Chen, ¡§Programmable video processor design,¡¨ in Proceedings of 1996 IEEE International Symposium on Circuits and Systems, (ISCAS¡¦96), Atlanta, May 1996.

59. C.-W. Ku, L.-G. Chen, C.-H. Chen, C.-Y. Chiu, and C.-T. Huang, ¡§Investigation of a visual telephone prototyping on personal computers,¡¨ in Proceedings of 1996 IEEE International Conference on Consumer Electronics (ICCE¡¦96), June 1996, Chicago.

60. Y.-K. Lai, and L.-G. Chen, ¡§A novel video signal processor with programmable data arrangement and efficient memory configuration,¡¨ in Proceedings of 1996 IEEE International Conference on Consumer Electronics (ICCE¡¦96), June 1996, Chicago.

61. H.-T. Chen and L.-G. Chen, ¡§A multimedia conference system: using region based hybrid coding,¡¨ in Proceedings of 1996 IEEE International Conference on Consumer Electronics (ICCE¡¦96), June 1996, Chicago.

62. C.-T. Chen, and L.-G. Chen, ¡§A novel architecture for Lempel-Ziv-based data compression,¡¨ in Proceedings of 1996 IEEE International Conference on Consumer Electronics (ICCE¡¦96), June 1996, Chicago.

63. C.-T. Chen, and L.-G. Chen, ¡§VLSI implementation of a selective median filter,¡¨ in Proceedings of 1996 IEEE International Conference on Consumer Electronics (ICCE¡¦96), June 1996, Chicago.

64. C.-T. Chen and L.-G. Chen, ¡§A self-adjusting weighted median filter for removing pulse noise in images,¡¨ in Proceedings of 1996 IEEE International Conference on Image Processing, Switzerland, September 1996.

65. P.-C. Wu and L.-G. Chen, ¡§Design Strategy for three-dimensional subband filter banks,¡¨ in Proceedings of 1996 IEEE International Conference on Image Processing, Switzerland, September 1996.

66. C.-W. Ku, L.-G. Chen, Y.-M. Chiu, and Y.-P. Lee, ¡§A pseudo object-oriented very low bit-rate video coding system with cache VQ for detail compensation,¡¨ in Proceedings of 1996 IEEE International Conference on Image Processing, Switzerland, September 1996.

67. P.-C. Wu, L.-G. Chen, Y.-C. Liu, and Y.-K. Lai, ¡§Investigation of filtering permutation schemes in three-dimensional subband filter banks,¡¨ in Proceedings of 1996 IEEE International Conference on Communication Systems (ICCS¡¦96) and IEEE International Workshop on Intelligent Signal Processing and Communication Systems, Singapore, November 1996.

68. P.-C. Wu, L.-G. Chen, and H.-T. Chen, ¡§A new method for reduction of blocking effects,¡¨ in Proceedings of 1996 IEEE International Conference on Communication Systems (ICCS¡¦96) and IEEE International Workshop on Intelligent Signal Processing and Communication Systems, Singapore, November 1996.

69. T.-H. Tsai, L.-G. Chen, Y.-C. Liu, Y.-K. Lai, P.-C. Wu, ¡§A novel MPEG-2 audio decoder with efficient data arrangement and memory configuration,¡¨ in Proceedings of 1997 IEEE International Conference on Consumer Electronics, Chicago, June 1997.

70. R.-X. Chen, L.-G. Chen, M.-J. Chen, and T.-H. Tsai, ¡§A I-phone system design and implementation with a portable speech coding coprocessor,¡¨ in Proceedings of 1997 IEEE International Conference on Consumer Electronics, Chicago, June 1997.

71. S. Liao and L.-G. Chen, ¡§A Low-power low-voltage direct digital frequency synthesizer,¡¨ in Proceedings of 1997 International Symposium on VLSI Technology, Systems, and Applications, Taipei, June 1997.

72. Y.-K. Lai, L.-G. Chen, and J.-F Shen, ¡§An efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm,¡¨ in Proceedings of 1997 IEEE International Symposium on Circuits and Systems (ISCAS¡¦97), Hong-Kong, June 1997.

73. M.-J. Chen, L.-G. Chen, R.-M. Wong, and Y.-P. Lee, ¡§Efficient hierarchical motion estimation algorithm based on visual pattern block segmentation,¡¨ in Proceedings of 1997 IEEE International Symposium on Circuits and Systems (ISCAS¡¦97), Hong-Kong, June 1997.

74. C.-T. Chen, and L.-G. Chen, ¡§High-speed VLSI design of the LZ-based data compression,¡¨ in Proceedings of 1997 IEEE International Symposium on Circuits and Systems (ISCAS¡¦97), Hong-Kong, June 1997.

75. P.-C. Wu, L.-G. Chen, Y.-C. Liu, and Y.-K. Lai, ¡§Hardware efficient design of filter banks for video coding,¡¨ in Proceedings of 1997 IEEE International Symposium on Circuits and Systems (ISCAS¡¦97), Hong-Kong, June 1997.

76. Y.-K. Lai, L.-G. Chen, T.-H. Tsai, and P.-C. Wu, ¡§A novel scalable architecture with memory interleaving organization for full search block-matching algorithm,¡¨ in Proceedings of 1997 IEEE International Symposium on Circuits and Systems (ISCAS¡¦97), Hong-Kong, June 1997.

77. Y.-K. Lai, L.-G. Chen, and Y.-P. Lee, ¡§A flexible data-interleaving architecture for full-search block-matching algorithm,¡¨ in Proceedings of 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP¡¦97), Zurich, July 1997.

78. M.-J. Chen, L.-G. Chen, and R.-X. Chen, ¡§Error resilience for block loss with overlapped motion compensation,¡¨ in Proceedings of 1997 IEEE International Conference on Image Processing (ICIP¡¦97), California, October 1997.

79. Y.-K. Lai, L.-G. Chen, T.-H. Tsai, and P.-C. Wu, ¡§A flexible high-throughput VLSI architecture with 2-D data-reuse for full-search motion estimation,¡¨ in Proceedings of 1997 IEEE International Conference on Image Processing (ICIP¡¦97), California, October 1997.

80. L.-G. Chen and C.-J. Liou, ¡§A real-time face recognition system,¡¨ in Proceedings of 1997 International Symposium on Multimedia Information Processing (ISMIP¡¦97), Taipei, December 1997.

81. Y.-K. Lai, G.-S. Lin, C.-W. Ku, and L.-G. Chen, ¡§A novel VLSI architecture of motion estimator for H.263 video coding,¡¨ in Proceedings of 1997 International Symposium on Multimedia Information Processing (ISMIP¡¦97), Taipei, December 1997.

82. L.-G. Chen and T.-H. Tsai, ¡§A low cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder,¡¨ in Proceedings of 1998 IEEE International Symposium on Circuits and Systems (ISCAS¡¦98), Monterey, USA, May 1998.

83. L.-G. Chen, J.-Y Jiu, H.-C. Chang, Y.-P. Lee, and C.-W. Ku, ¡§Low power 2D DCT chip design for wireless multimedia terminal,¡¨ in Proceedings of 1998 IEEE International Symposium on Circuits and Systems (ISCAS¡¦98), Monterey, USA, May 1998.

84. L.-G. Chen and T.-H. Tsai, ¡§A novel MPEG audio degrouping algorithm,¡¨ in Proceedings of 1998 IEEE International Symposium on Circuits and Systems (ISCAS¡¦98), Monterey, USA, May 1998.

85. C.-H. Chen, L.-G. Chen, and H.-C. Chang, ¡§Using a region-based blurring method and bits allocation to enhance quality on face region in very low bit rate video coding,¡¨ in Proceedings of 1998 IEEE International Symposium on Circuits and Systems (ISCAS¡¦98), Monterey, USA, May 1998.

86. H.-T. Chen, L.-G. Chen, S.-C. Huang, T.-H. Tsai, and H.-C. Chang, ¡§An adaptive network control scheme for region-based hybrid coding algorithm,¡¨ in Proceedings of 1998 IEEE International Symposium on Circuits and Systems (ISCAS¡¦98), Monterey, USA, May 1998.

87. Y.-C. Liu, T.-H. Tsai, P.-C. Wu, and L.-G. Chen, ¡§VLSI implementation of visual block pattern truncation coding,¡¨ in Proceedings of 1998 IEEE International Conference on Consumer Electronics (ICCE¡¦98), Los Angeles, USA, June 1998.

88. Y.-K. Lai and L.-G. Chen, ¡§VLSI implementation of motion estimator with two-dimensional data-reuse,¡¨ in Proceedings of 1998 IEEE International Conference on Consumer Electronics (ICCE¡¦98), Los Angeles, USA, June 1998.

89. H.-C. Chang and L.-G. Chen, ¡§An efficient modeling architecture for real-time context-based arithmetic coding,¡¨ in Proceedings of 1999 SPIE International Conference on Visual Communications and Image Processing (VCIP¡¦99), San Jose, California, January 1999.

90. H.-C. Chang, L.-G. Chen, Y.-C. Chang, and S.-C. Huang, ¡§A VLSI architecture design of VLC encoder for high data rate video/image coding,¡¨ in Proceedings of 1999 IEEE International Symposium on Circuits and Systems (ISCAS¡¦99), Florida USA, May 1999.

91. S.-C. Huang, L.-G. Chen, and H.-C. Chang, ¡§A novel image compression algorithm by using LOG-EXP transform,¡¨ in Proceedings of 1999 IEEE International Symposium on Circuits and Systems (ISCAS¡¦99), Florida USA, May 1999.

92. J.-F. Shen, L.-G. Chen, H.-C. Chang, and C.-J. Lian, ¡§Low power full-search block-matching motion estimation chip for H.263+ video coding,¡¨ in Proceedings of 1999 IEEE International Symposium on Circuits and Systems (ISCAS¡¦99), Florida USA, May 1999.

93. S.-Y. Ma and L.-G. Chen, ¡§A single chip CMOS APS camera with direct frame difference output,¡¨ in Proceedings of Custom Integrated Circuits Conference (CICC'99), California USA, June 1999.

94. T.-H. Tsai, L.-G. Chen, and R.-J. Wu, ¡§A system level integration methodology for MPEG-2 audio decoder with embedded RISC core,¡¨ in Proceedings of International Symposium on VLSI-TSA, Taipei, Taiwan, June 1999.

95. P.-C. Wu and L.-G. Chen, ¡§High-performance architecture design for two-dimensional discrete wavelet transform,¡¨ in Proceedings of International Symposium on VLSI-TSA, Taipei, Taiwan, June 1999.

96. S.-C. Huang and L.-G. Chen, ¡§A log-exp still image compression chip design,¡¨ in Proceedings of 1999 IEEE International Conference on Consumer Electronics, Los Angeles, USA, June 1999.

97. H.-C. Chang, L.-G. Chen, C.-J. Lian, Y.-C. Chang, and L.-L. Chen, ¡§IP design of a re-configurable baseline JPEG coding,¡¨ in Proceedings of The First IEEE Asia Pacific Conference on ASICs, Seoul, Korea, August 1999.

98. C.-W. Ku, F.-Y. Kuo, C.-K. Chen, and L.-G. Chen, ¡§Low powered multi-code correlation architecture for IMT-2000,¡¨ in Proceedings of 10th International Symposium on Personal, Indoor and Mobile Radio Communications, Osaka, September 1999.

99. R.-M. Weng, L.-G. Chen, and M.-H. Lee, ¡§Synthesis of cascadable Nth-order current-mode lowpass filters using CCII+s,¡¨ in Proceedings of 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS¡¦99), Thailand, December 1999.

100. T.-H. Tsai and L.-G. Chen, ¡§A novel inverse quantization and multichannel processing architecture for MPEG-2 audio applications,¡¨ in Proceedings of 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS¡¦99), Thailand, December 1999.

101. C.-Y. Chen, T.-C. Wang, and L.-G. Chen, ¡§A programmable VLSI architecture for 2D discrete wavelet transform,¡¨ in Proceedings of 2000 IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Swiss, May 2000.

102. H.-C. Chang, L.-G. Chen, M.-Y. Hsu and Y.-C. Chang, ¡§Performance analysis and architecture evaluation of MPEG-4 video codec system,¡¨ in Proceedings of 2000 IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Swiss, May 2000.

103. H.-C. Chang, Y.-C. Chang and L.-G. Chen, ¡§MPEG-4 video bitstream structure analysis and its parsing architecture design,¡¨ in Proceedings of 2000 IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Swiss, May 2000.

104. S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, ¡§An efficient video segmentation algorithm for real-time MPEG-4 camera system,¡¨ in Proceedings of 2000 SPIE International Conference on Visual Communication and Image Processing (VCIP 2000), 2000.

105. S.-Y. Ma, S.-Y. Chien, and L.-G. Chen, ¡§An efficient moving object segmentation for MPEG-4 encoding systems,¡¨ in Proceedings of 2000 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2000), Honolulu, Hawaii, U.S.A., November 2000.

106. Y.-W. Huang, S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, ¡§Analysis of global motion effects on video segmentation,¡¨ in Proceedings of 2000 Asia Pacific Conference on Multimedia Technology and Applications (APCMTA 2000), Kaohsiung, Taiwan, R.O.C., Dec. 2000.

107. C.-J. Lian, L.-G. Chen, H.-C. Chang, and Y.-C. Chang, ¡§Design and implementation of JPEG encoder IP core,¡¨ in Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC 2001), Yokohama, Japan, January 2001.

108. Y.-C. Wang, H.-C. Chang, and L.-G. Chen, ¡§Efficient architecture of binary motion estimation for MPEG-4 shape coding,¡¨ in Proceedings of 2000 SPIE International Conference on Visual Communications and Image Processing (VCIP 2001), San Jose, California, USA, January 2001.

109. S.-F. Lin, W.-S. Ji, and L.-G. Chen, ¡§An efficient test bitstream design methodology for fast visual hardware simulation,¡¨ in Proceedings of 2001 Picture Coding Symposium (PCS 2001), Seoul, Korea, April 2001.

110. S.-Y. Chien, S.-Y. Ma, L.-G. Chen, ¡§A partial-result-reuse architecture and its design technique for morphological operations,¡¨ in Proceedings of 2001 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP 2001), Salt Lake City, Utah, USA, May 2001.

111. S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, L.-G. Chen, ¡§A hybrid morphology processing units architecture for real-time video segmentation systems,¡¨ in Proceedings of 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, Australia, May 2001.

112. K.-F. Chen, C.-J. Lian, H.-H. Chen, L.-G. Chen, ¡§Analysis and architecture design of EBCOT for JPEG-2000,¡¨ in Proceedings of 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, Australia, May 2001.

113. H.-C. Chang, Z.-L. Yang, C.-J. Lian, and L.-G. Chen, ¡§Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding,¡¨ in Proceedings of 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, Australia, May 2001.

114. C.-J. Lian, K.-F. Chen, H.-H. Chen, L.-G. Chen, ¡§Lifting based discrete wavelet transform architecture for JPEG2000,¡¨ in Proceedings of 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, Australia, May 2001.

115. M.-Y. Hsu, H.-C. Chang, Y.-C. Wang, L.-G. Chen, ¡§Scalable module-based architecture for MPEG-4 BMA motion estimation,¡¨ in Proceedings of 2001 IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, Australia, May 2001.

116. S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, and L.-G. Chen,¡§A real-time practical video segmentation algorithm for MPEG-4 camera systems,¡¨in Proceedings of 2001 IEEE International Conference on Consumer Electronics (ICCE 2001), Los Angeles, USA, June 2001.

117. T.-C. Wang, P.-C. Tseng, and L.-G. Chen,¡§H.26L intra mode encoder architecture for digital camera application,¡¨in Proceedings of 2001 IEEE International Conference on Consumer Electronics (ICCE 2001), Los Angeles, USA, June 2001.

118. P.-C. Tseng, C.-K. Chen, and L.-G. Chen,¡§CDSP: an application-specific digital signal processor for third generation wireless communication,¡¨in Proceedings of 2001 International Conference on Consumer Electronics (ICCE 2001), Los Angeles, USA, June 2001.

119. P.-J. Lee, L.-G. Chen, W.-J. Wang, and M.-J. Chen, ¡§Roust error concealment algorithm for MPEG-4 with the aid of fuzzy theory,¡¨ in Proceedings of 2001 International Conference on Consumer Electronics (ICCE 2001), Los Angeles, USA, June 2001.

120. L.-G. Chen, C.-J. Lian, K.-F. Chen, H.-H. Chen, ¡§Analysis and architecture design of JPEG2000,¡¨ in Proceedings of 2001 IEEE International Conference on Multimedia and Expo (ICME 2001), Tokyo, Japan, August 2001.

121. Y.-C. Chang, C.-C. Huang, H.-C. Chang, H.-C. Fang, L.-G. Chen, ¡§Error-propagation analysis and concealment strategy for MPEG-4 video bitstream with data partitioning,¡¨ in Proceedings of 2001 IEEE International Conference on Multimedia and Expo (ICME 2001), Tokyo, Japan, August 2001.

122. S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, L.-G. Chen, ¡§Automatic video segmentation for MPEG-4 using predictive watershed,¡¨ in Proceedings of 2001 IEEE International Conference on Multimedia and Expo (ICME 2001), Tokyo, Japan, August 2001.

123. C.-J. Lian, H.-C. Chang, K.-F. Chen, and L.-G. Chen, ¡§A JPEG decoder IP core supporting user-defined Huffman table decoding,¡¨ in Proceedings of 2001 International Symposium on Integrated Circuits, Devices and Systems (ISIC 2001), Marina Mandarin, Singapore, September 2001.

124. Y.-W. Huang, S.-Y. Chien, B.-Y. Hsieh, and L.-G. Chen, ¡§Automatic threshold decision of background registration technique for video segmentation,¡¨ in Proceedings of 2002 SPIE International Conference on Visual Communications and Image Processing (VCIP 2002), San Jose, California, January 2002.

125. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, ¡§VLSI implementation of shape-adaptive discrete wavelet transform,¡¨ in Proceedings of 2002 SPIE International Conference on Visual Communications and Image Processing (VCIP 2002), San Jose, California, January 2002.

126. S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, and L.-G. Chen, ¡§Predictive watershed for image sequences segmentation,¡¨ in Proceedings of 2002 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP 2002), Orlando, Florida, May 2002.

127. Y.-W. Huang, S.-Y. Chien, B.-Y. Hsieh, and L.-G. Chen, ¡§An efficient and low power architecture design for motion estimation using global elimination algorithm,¡¨ in Proceedings of 2002 IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP 2002), Orlando, Florida, May 2002.

128. W.-M. Chao, C.-W. Hsu, Y.-C. Chang, and L.-G. Chen, ¡§A novel hybrid motion estimator supporting diamond search and fast full search,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

129. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

130. H.-H. Chen, C.-J. Lian, T.-H. Chang, and L.-G. Chen, ¡§Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

131. T.-C. Wang, H.-C. Fang, and L.-G. Chen, ¡§An UVLC encoder architecture for H.26L,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

132. S.-Y. Chien, Y.-W. Huang, and L.-G. Chen, ¡§A hardware accelerator for video segmentation using programmable morphology PE array,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

133. P.-C. Wu, C.-T. Huang, and L.-G. Chen, ¡§An efficient architecture for two-dimensional inverse discrete wavelet transform,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

134. Y.-K. Lai, L.-G. Chen, J.-Y. Lai, T.-M. Parng, ¡§VLSI architecture design and implementation for twofish block cipher,¡¨ in Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, May 2002.

135. S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, and L.-G. Chen, ¡§Single chip video segmentation system with a programmable PE array,¡¨ in Proceedings of Asia-Pacific Conference on ASIC 2002 (AP-ASIC2002), Taipei, Taiwan, August 2002.

136. Y.-W. Huang, B.-Y. Hsieh, S.-Y. Chien, and L.-G. Chen, ¡§Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

137. S.-Y. Chien, C.-Y. Chen, Y.-W. Huang, and L.-G. Chen, ¡§Multiple sprites and frame skipping techniques for sprite generation with high subjective quality and fast speed,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

138. C.-W. Hsu, W.-M. Chao, Y.-C. Chang, and L.-G. Chen, ¡§Texture coder design of MPEG-4 video by using interleaving schedule,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

139. T.-C. Wang, H.-C. Fang, and L.-G. Chen, ¡§Low delay, error robust wireless video transmission architecture for video communication,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

140. P.-J. Lee and L.-G. Chen, ¡§Bit-plane error recovery via cross subband for image transmission in JPEG2000,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

141. S.-F. Lin, Y.-L. Chang, and L.-G. Chang, ¡§Motion adaptive interpolation with morphological operation and 3:2 pull-downed recovery for deinterlacing,¡¨ in Proceedings of 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lausanne, Switzerland, August 2002.

142. T.-H. Chang, L.-L. Chen, C.-J. Lian, H.-H. Chen, and L.-G. Chen, ¡§Computation reduction technique for lossy JPEG2000 encoding through EBCOT tier-2 feedback processing,¡¨ in Proceedings of 2002 IEEE International Conference on Image Processing (ICIP 2002), New York, USA, September 2002.

143. S.-Y. Chien, C.-Y. Chen, W.-M. Chao, C.-W. Hsu, Y.-W. Huang, and L.-G. Chen, ¡§A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques,¡¨ in Proceedings of 2002 IEEE International Conference on Image Processing (ICIP 2002), New York, USA, September 2002.

144. H.-C. Fang, T.-C. Wang, and L.-G. Chen, ¡§Real-time deblocking filter for MPEG-4 systems,¡¨ in Proceedings of 2002 IEEE Asia-Pacific Conference on Circuits and Systems (APPCAS 2002), Singapore, December 2002.

145. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform,¡¨ in Proceedings of 2002 IEEE Asia-Pacific Conference on Circuits and Systems (APPCAS 2002), Singapore, December 2002.

146. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, ¡§Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method,¡¨ in Proceedings of 2002 IEEE Asia-Pacific Conference on Circuits and Systems (APPCAS 2002), Singapore, December 2002.

147. P.-J. Lee and L.-G. Chen, ¡§Error recovery for MPEG-4 shape and texture information,¡¨ in Proceedings of 2002 IEEE Asia-Pacific Conference on Circuits and Systems (APPCAS 2002), Singapore, December 2002.

148. Y.-W. Huang, B.-Y. Hsieh, T.-C. Wang, S.-Y. Chien, S.-Y. Ma, C.-F. Shen, and L.-G. Chen, ¡§Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264,¡¨ in Proceedings of 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP2003), Hong-Kong, April 2003. (U18-93c-08a, UMC 0.18)

149. T.-C. Wang, Y.-W. Huang, H.-C. Fang, and L.-G. Chen, ¡§Performance analysis of hardware oriented algorithm modifications in H.264,¡¨ in Proceedings of 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP2003), Hong-Kong, April 2003. (U18-93c-08a, UMC 0.18)

150. H.-C. Fang, T.-C. Wang, Y. W. Chang, and L.-G. Chen, ¡§Hardware oriented rate control algorithm and implementation for realtime video coding,¡¨ in Proceedings of 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP2003), Hong-Kong, April 2003. ()

151. S.-F. Lin, Y.-L. Chang, and L.-G. Chen, ¡§Motion adaptive de-interlacing with horizontal motion detection and ELA with median,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. ()

152. T.-H. Tsai, S.-W. Huang, L.-G. Chen, ¡§Design of a low-power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. ()

153. S.-Y. Chien, C.-Y. Chen, W.-M. Chao, Y.-W. Huang, and L.-G. Chen, ¡§Analysis and hardware architecture for global motion estimation and compensation in MPEG-4 advanced simple profile,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. ()

154. Y.-W. Huang, T.-C. Wang, B.-Y. Hsieh, and L.-G. Chen, ¡§Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. (U18-93C-08, UMC 0.18)

155. T.-H. Chang, C.-J. Lian, H.-H. Chen, J.-Y. Chang, and L.-G. Chen, ¡§Effective hardware-oriented technique for the rate control of JPEG2000 encoding,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. (M25-92A-31, TSMC 0.25) (M25-92C-04a, TSMC 0.25)

156. W.-M. Chao, T.-C. Chen, Y.-C. Chang, C.-W. Hsu, and L.-G. Chen, ¡§Computaionally controllable integer, half, and quarter-pel motion estimator for MPEG-4 advanced simple profile,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. ()

157. T.-C. Wang, Y.-W. Huang, H.-C. Fang, and L.-G. Chen, ¡§Parallel 4x4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. (M25-92C-10a, TSMC 0.25) (U18-93C-08, UMC 0.18) (T18-94B-44a, TSMC 0.18)

158. H.-C. Fang, T.-C. Wang, C.-J. Lian, T.-H. Chang and L.-G. Chen, ¡§High speed memory efficient EBCOT architecture for JPEG2000,¡¨ in Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand, May 2003. (M25-92C-04a, TSMC 0.25)

159. Y.-C. Chang, C.-C. Huang, W.-M. Chao, and L.-G. Chen, ¡§An efficient embedded bitstream parsing processor for MPEG-4 video decoding system,¡¨ in Proceedings of 2003 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA 2003), Hsinchu, Taiwan, Oct. 2003. (S35-91C-11a, TSMC 0.35)

160. P.-J. Lee, M.-J. Chen, and L.-G. Chen, ¡§Error concealment algorithm using interested direction for JPEG 2000 image transmission,¡¨ in Proceedings of 2003 IEEE International Conference on Consumer Electronics (ICCE 2003), Los Angeles, USA, June 2003. ()

161. C.-Y. Chen, S.-Y. Chien, Y.-H. Chen, Y.-W. Huang, and L.-G. Chen, ¡§Unsupervised object-based sprite coding system for tennis sport,¡¨ in Proceedings of 2003 IEEE International Conference on Multimedia and Expo (ICME 2003), Baltimore, USA, July 2003. ()

162. Y.-W. Huang, T.-W. Chen, B.-Y. Hsieh, T.-C. Wang, T.-H. Chang, and L.-G. Chen, ¡§Architecture design for deblocking filter in H.264/JVT/AVC,¡¨ in Proceedings of 2003 IEEE International Conference on Multimedia and Expo (ICME 2003), Baltimore, USA, July 2003.

163. H.-C. Fang, T.-C. Wang, and L.-G. Chen, ¡§Novel word-level algorithm of embedded block coding in JPEG 2000,¡¨ in Proceedings of 2003 IEEE International Conference on Multimedia and Expo (ICME 2003), Baltimore, USA, July 2003.

164. B.-Y. Hsieh, Y.-W. Huang, T.-C. Wang, S.-Y. Chien, and L.-G. Chen, ¡§Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria,¡¨ in Proceedings of 2003 SPIE International Conference on Visual Communications and Image Processing (VCIP 2003), Lausanne, Switzerland, July 2003.

165. S.-Y. Chien, S.-H. Yu, L.-F. Ding, Y.-N. Huang, and L.-G. Chen, ¡§Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach,¡¨ in Proceedings of 2003 SPIE International Conference on Visual Communications and Image Processing (VCIP 2003), Lausanne, Switzerland, July 2003.

166. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank,¡¨ in Proceedings of 2003 IEEE International Conference on Image Processing (ICIP2003), Barcelona, Spain, September 2003.

167. Y.-L. Chang, C.-Y. Chen, S.-F. Lin, and L.-G. Chen, ¡§Motion compensated de-interlacing with adaptive global motion estimation and compensation,¡¨ in Proceedings of 2003 IEEE International Conference on Image Processing (ICIP2003), Barcelona, Spain, September 2003.

168. S.-Y. Chien, S.-H. Yu, L.-F. Ding, Y.-N. Huang, and L.-G. Chen, ¡§Efficient stereo video coding system for immersive teleconference with two-stage hybrid disparity estimation algorithm,¡¨ in Proceedings of 2003 IEEE International Conference on Image Processing (ICIP2003), Barcelona, Spain, September 2003. ()

169. Y.-C. Chan, W.-M. Chao, and L.-G. Chen, ¡§Platform-based MPEG-4 video encoder SOC design,¡¨ in Proceedings of 2003 IEEE International Conference on Image Processing (ICIP2003), Barcelona, Spain, September 2003. (S35-91C-09a, TSMC 0.35um)

170. S.-S. Lin, P.-C. Tseng, and L.-G. Chen, ¡§Low-power parallel tree architecture for full-search block-matching motion estimation,¡¨ in Proceedings of 2004 SOC Design Conference, Seoul, Korea. (U18-93A-03a, UMC 0.18um)

171. H.-C. Fang, C.-T. Huang, Y.-W. Chang, T.-C. Wang, P.-C. Tseng, C.-J Lian, and L.-G. Chen, ¡§81MS/s JPEG 2000 single-chip encoder with rate-distortion optimization,¡¨ in Proceedings of 2004 IEEE International Solid-State Circuits Conference (ISSCC 2004), San Francisco, California, USA, February, 2004. (M25-92C-04a, TSMC 0.25um)

172. Y.-W. Chang, H.-C. Fang, C.-J. Lian, and L.-G. Chen, ¡§Novel pre-compression rate-distortion optimization algorithm for JPEG 2000,¡¨ in Proceedings of 2004 SPIE International Conference on Visual Communications and Image Processing (VCIP 2004), San Jose, California, USA, January 2004. (M25-92C-04a, TSMC 0.25um)

173. H.-C. Fang, Y.-W. Chang, and L.-G. Chen, "Area Efficient Architecture for the Embedded Block Coding in JPEG 2000," in Proceedings of 2004 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2004), Hiroshima, Japan, July 28. (U18-93D-06a, UMC 0.18um)

174. Y.-W. Huang, C.-H. Tsai, and L.-G. Chen, ¡§Parallel global elimination algorithm and architecture design for fast block matching motion estimation,¡¨ in Proceedings of 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), Montreal, Quebec, Canada, May 2004. (S35-91C-08a, TSMC 0.35um)

175. T.-C Chen, Y.-W. Huang, and L.-G. Chen, ¡§Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC,¡¨ in Proceedings of 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), Montreal, Quebec, Canada, May 2004.

176. T.-C Chen, Y.-W. Huang, and L.-G. Chen, ¡§Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC,¡¨ in Proceedings of 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), Montreal, Quebec, Canada, May 2004. (U18-93C-07 ,UMC 0.18um 1P6M CMOS)

177. C.-T Huang, P.-C. Tseng, and L.-G. Chen, ¡§Memory analysis and architecture for two-dimensional discrete wavelet transform,¡¨ in Proceedings of 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), Montreal, Quebec, Canada, May 2004.

178. Y.-L Chang, P.-H. Wu, S.-F. Lin, and L.-G. Chen, ¡§Four field local motion compensated de-interlacing,¡¨ in Proceedings of 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), Montreal, Quebec, Canada, May 2004.

179.

180. Y.-W. Huang, B.-Y. Hsieh, T.-C. Chen, and L.-G. Chen, ¡§Hardware architecture design for H.264/AVC intra frame coder,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004.

181. T.-C Chen, Y.-W. Huang, and L.-G. Chen, ¡§Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004. (U18-93C-07 ,UMC 0.18um 1P6M CMOS)

182. C.-Y. Chen, S.-Y. Chien, W.-M. Chao, Y.-W. Huang, and L.-G. Chen, ¡§Hardware architecture for global motion estimation for MPEG-4 advanced simple profile,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004. (U18-93B-06A)

183. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, ¡§Reconfigurable discrete cosine transform processor for object-based video signal processing,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004.

184. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§B-spline factorization-based architecture for inverse discrete wavelet transform,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004.

185. S.-S. Lin, P.-C. Tseng, and L.-G. Chen, ¡§Low-power parallel tree architecture for full-search block-matching motion estimation,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004.

186. Y.-L. Chang, S.-F. Lin, and L.-G. Chen, ¡§Extended intelligent edge-based line average with its implementation and test method,¡¨ in Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 2004.

187. J.-Y Chang, C.-J. Lian, and L.-G. Chen, "Architecture and Analysis of Color Structure and Scalable Color Descriptor for Real-Time Video Indexing and Retrieval", in Proceedings of 2004 IEEE International Symposium on Consumer Electronics (ISCE 2004), Reading, United Kingdom, September 2004.

188. J.-Y Chang, H.-C. Fang, Y.-W, Huang, and L.-G. Chen, "Architecture of MPEG-7 Color Structure Description Generator for Real-time Video Applications", in Proceedings of 2004 IEEE International Conference on Image Processing (ICIP 2004), Singapore, Singapore, October 2004.

189. J.-Y Chang, C.-J. Lian, H.-C. Fang, and L.-G. Chen, "Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval" in Proceedings of 2004 Pacific-Rim Conference on Multimedia (PCM 2004), Tokyo, Japan, December 2004. (U18-93B-05a, UMC 0.18)

190. Y.-W. Chang, H.-C. Fang, and L.-G. Chen, "High Performance Two-Symbol Arithmetic Encoder in JPEG 2000", in Proceedings of 2004 IEEE International Symposium on Consumer Electronics (ISCE 2004), Reading, United Kingdom, September 2004. ()

191. Pei-Jun Lee, Homer Chen, and Liang-Gee Chen, ¡§A New Error Concealment algorithm for H.264 Video Transmission,¡¨ International Symposium on Intelligent Multimedia, Video & Speech Processing, Hong-Kong, Oct. 2004. ()

192. Y.-W. Huang, T.-C. Chen, C.-H. Tsai, C.-Y. Chen, T.-W. Chen, C.-S. Chen, C.-F. Shen, S.-Y. Ma, T.-C. Wang, B.-Y. Hsieh, H.-C. Fang, and L.-G. Chen, "A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications," in Proceedings of 2005 IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco, United States, February 2005. (U18-93C-07 ,UMC 0.18um 1P6M CMOS)

193. C.-T. Huang, C.-Y. Chen, Y.-H. Chen, and L.-G. Chen, ¡§Memory Analysis of VLSI Architecture for 5/3 and 1/3 Motion-Compensated Temporal Filtering,¡¨ in Proceedings of 2005 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2005), Philadelphia, USA, March 2005. ()

194. H.-C. Fang, Y.-W. Chang, C.-C. Cheng, C.-C. Chen, and L.-G. Chen, "MEMORY EFFICIENT JPEG 2000 ARCHITECTURE WITH STRIPE PIPELINE SCHEME," in Proceedings of 2005 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2005), Philadelphia, PA, USA, Mar. 2005. ()

195. Y.-L. Chang, S.-F. Lin, and L.-G. Chen, "Four Field Variable Block Size Motion Compensated Adaptive De-interlacing" in Proceedings of 2005 IEEE International Conference on Acoustics, Speech, and Signal Processing, Philadelphia (ICASSP 2005), PA, USA, Mar. 2005. ()

196. Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, and Liang-Gee Chen, ¡§Dual-block-pipelined VLSI architecture of entropy coding for H.264/AVC baseline profile,¡¨ in Proceedings of 2005 IEEE International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA 2005), Hsinchu, Taiwan, 2005. (U18-93C-07 ,UMC 0.18um 1P6M CMOS)

197. Y.-W. Huang, C.-L. Lee, C.-Y. Chen, and L.-G. Chen, "Computation-Aware Motion Estimation with Adaptive Search Strategy," in Proceedings of 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 2005.

198. Y.-H. Chen, C.-Y. Chen, and L.-G. Chen, "Architecture of Global Motion Compensation for MPEG-4 Advanced Simple Profile," in Proceedings of 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 2005. (U1893e-19u, UMC 0.18)

199. S.-W. Huang, T.-H. Tsai, and L.-G. Chen, "Memory and Computationally Efficient Psychoacoustic Model for MPEG AAC on 16-bit Fixed-point Processors", in Proceedings of 2005 International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 23-26, 2005.

200. Chih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, and Liang-Gee Chen, " Multiple-lifting Scheme: Memory-efficient VLSI Implementation for Line-based 2-D DWT", in Proceedings of 2005 International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 23-26, 2005. ()

201. L.-F. Ding, S.-Y. Chien, Y.-W. Huang, Y.-L. Chang, and L.-G. Chen, "Stereo Video Coding System with Hybrid Coding Based on Joint Prediction Scheme," in Proceedings of 2005 International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 23-26, 2005. (T18-94C-37a)

202. Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Chao-Tsung Huang, and Liang-Gee Chen, ¡§Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC,¡¨ in Proceedings of 2005 International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 23-26, 2005. ()

203. T.-W. Chen, Y.-W. Huang, T.-C. Chen, Y.-H. Chen, C.-Y. Tsai, L.-G. Chen, "Architecture Design of H.264/AVC Decoder with Hybrid Task Pipelining for High Definition Videos," in Proceedings of 2005 International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan, May 23-26, 2005. (T18-94B-44a, TSMC 0.18um 1P6M CMOS)

204. S.-W. Huang, T.-H. Tsai, and L.-G. Chen, "Fast Filterbanks for the Low Power MPEG High Efficiency Advanced Audio Coding Decoder", accepted by Audio Engineering Society (AES) 118th, Barcelona, Spain, May 28-31, 2005.

205. W.-Y. Chen, Y.-L. Chang, S.-F. Lin, L.-F. Ding and L.-G. Chen, "EFFICIENT DEPTH IMAGE BASED RENDERING WITH EDGE DEPENDENT DEPTH FILTER AND INTERPOLATION, " in Proceedings of 2005 IEEE International Conference on Multimedia and Expo (ICME 2005), Amsterdamn, Netherland, July 2005.

206. C.-P. Lin, P-C. Tseng, and L.-G. Chen, "EARLY LOSSLESS CONTENT-DEPENDENT LOW-POWER DCT DESIGN FOR MOBILE VIDEO APPLICATIONS" in Proceedings of 2005 IEEE International Conference on Multimedia and Expo (ICME 2005), Amsterdamn, Netherland, July 2005. (U18-94C-22au)

207. L.-F. Ding, S.-Y. Chien, and L.-G. Chen, "Algorithm and Architecture of Prediction Core in Stereo Video Hybrid Coding System," in Proceedings of 2005 IEEE Workshop on Signal Processing Systems (SiPS 2005), Athens, Greece, Nov. 2005. (T18-94C-37a)

208. C.-C. Cheng, P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "Multi-Mode Embedded Compression Codec Engine," in Proceedings of 2005 IEEE Workshop on Signal Processing Systems (SiPS 2005), Athens, Greece, Nov.2005.

209. C.-H. Tsai, Y.-W. Huang, and L.-G. Chen, "Algorithm and Architecture Optimization for Full-mode Encoding of H.264/AVC Intra Prediction", in Proceedings of 2005 International Midwest Symposium on Circuit and Systems (MWSCAS 2005), Cincinnati, Ohio, USA, August 2005. (U18-93C-07, UMC 0.18um 1P6M CMOS)

210. C.-C. Chen, Y.-W. Chang, H.-C. Fang, and L.-G. Chen, "ANALYSIS AND ARCHITECTURE FOR MEMORY EFFICIENT JBIG2 ARITHMETIC ENCODER" in Proceedings of 2005 International Midwest Symposium on Circuit and Systems (MWSCAS 2005), Cincinnati, Ohio, USA, August 2005. ()

211. Chuan-Yung Tsai, Tung-Chien Chen, To-Wei Chen, and Liang-Gee Chen, "Bandwidth Optimized Motion Compensation Hardware Design for H.264/AVC HDTV Decoder" in Proceedings of 2005 International Midwest Symposium on Circuit and Systems (MWSCAS 2005), Cincinnati, Ohio, USA, August 2005. ()

212. C.-Y. Chen, C.-T. Huang, Y.-H. Chen, C.-J. Lian, and L.-G. Chen, "SYSTEM ANALYSIS OF VLSI ARCHITECTURE FOR MOTION-COMPENSATED TEMPORAL FILTERING," in Proceedings of 2005 IEEE International Conference on Image Processing (ICIP 2005), Genoa, Italy, Sep. 2005.

213. C.-H. Tsai, Y.-J. Chen, and L.-G. Chen. ¡§Analysis and Architecture Design for Multi-Symbol Arithmetic Encoder in H.264/AVC,¡¨ in Proceedings of 2005 SOC Design Conference, Seoul, Korea, October 2005. ()

214. T.-D. Chuang, Y.-H. Chen, C.-H. Tsai, and L.-G. Chen. ¡§Analysis and Architecture Design for Multi-transform for H.264/AVC High Profile,¡¨ in Proceedings of 2005 SOC Design Conference, Seoul, Korea, October 2005. ()

215. Tung-Chien Chen, Ke-Chung Wu, Yu-Han Chen, and Liang-Gee Chen "Hybrid-mode Embedded Compression for H.264/AVC Coding System" in Proceedings of the Intelligent Signal Processing and Communication Systems, Hong Kong, December 2005

216. Yu-Han Chen, Tung-Chien Chen, and Liang-Gee Chen "Hardware Oriented Content-adaptive Fast Algorithm for Variable Block-size Integer Motion Estimation in H.264" in Proceedings of the Intelligent Signal Processing and Communication Systems, Hong Kong, December 2005

217. Y.-W. Chang, H.-C. Fang, C.-C. Cheng, C.-C. Chen, C.-J. Lian, S.-Y. Chien, and L.-G. Chen, ¡§124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec without Tile Memory¡¨, accepted by 2006 Internal Solid-State Circuits Conference (ISSCC2006) (T18-93C-35a, TSMC 0.18um)

218. C-P. Lin, P-C. Tseng, Y-T. Chiu, S-S. Lin, C-C. Cheng, H-C. Fang, W-M. Chao, and L-G. Chen, ¡§A 5mW MPEG4 SP Encoder with 2D Bandwidth-Sharing Motion Estimation for Mobile Applications,¡¨ 2006 Internal Solid-State Circuits Conference (ISSCC2006).

219. C.-H. Pan, I-H. Lee, S.-C. Huang, C.-C. Cheng, C.-J. Lian, L.-G. Chen "Application Layer Header Correction Scheme for Video Header Protection on Wireless Network," in Proceedings of 2005 IEEE Int'l Symposium on Multimedia, Irvine, CA, USA, Dec. 2005.

220. You-Ming Tsao; Shao-Yi Chien; Chin-Hsiang Chang; Chung-Jr Lian; Liang-Gee Chen; ¡§Low power programmable shader with efficient graphics and video acceleration capabilities for mobile multimedia applications,¡¨ Consumer Electronics, 2006. ICCE '06. 2006 Digest of Technical Papers. International Conference on, 7-11 Jan. 2006 Page(s):395 ¡V 396

221. Tung-Chien Chen; Chung-Jr Lian; Liang-Gee Chen; ¡§Hardware architecture design of an H.264/AVC video codec,¡¨ Asia and South Pacific Conference on Design Automation, 24-27 Jan. 2006 Page(s):8 pp.

222. Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, and Liang-Gee Chen, ¡§Algorithm and Architecture Co-Design of Low-Power H.264 Baseline Profile Encoder for mobile applications,¡¨ IEEE International Picture Coding Symposium (PCS2006), Beijing, China, 2006

223. Yu-Wei Chang; Hung-Chi Fang; Chun-Chia Chen; Liang-Gee Chen; ¡§Design and Implementation Of Word-Level Embedded Block Coding Architecture in JPEG 2000 Decoder,¡¨ Acoustics, Speech and Signal Processing, 2006. ICASSP 2006 Proceedings. 2006 IEEE International Conference on, Volume 2, 14-19 May 2006 Page(s):II-449 - II-452

224. Tung-Chien Chen; Yu-Han Chen; Sung-Fang Tsai; Liang-Gee Chen; ¡§Architecture Design of Low Power Integer Motion Estimation for H. 264/AVC,¡¨ Acoustics, Speech and Signal Processing, 2006. ICASSP 2006 Proceedings. 2006 IEEE International Conference on, Volume 3, 21-24 May 2006 Page(s):III-900 - III-903

225. Chih-Chi Cheng; Chao-Tsung Huang; Jing-Ying Chang; Liang-Gee Chen; ¡§Line Buffer Wordlength Analysis for Line-Based 2-D DWT,¡¨ Acoustics, Speech and Signal Processing, 2006. ICASSP 2006 Proceedings. 2006 IEEE International Conference on, Volume 3, 21-24 May 2006 Page(s):III-924 - III-927

226. Chun-Chia Chen; Yu-Wei Chang; Hung-Chi Fang; Liang-Gee Chen; ¡§Analysis of scalable architecture for the embedded block coding in JPEG 2000,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

227. Tung-Chien Chen; Yu-Han Chen; Chuan-Yung Tsai; Liang-Gee Chen; ¡§Low power and power aware fractional motion estimation of H.264/AVC for mobile applications.¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

228. Chih-Chi Cheng; Ching-Yeh Chen; Yi-Hau Chen; Liang-Gee Chen; ¡§Analysis and VLSI architecture of update step in motion-compensated temporal filtering,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

229. Ching-Yeh Chen; Yi-Hau Chen; Chih-Chi Cheng; Liang-Gee ¡§Chen; Frame-level data reuse for motion-compensated temporal filtering,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 1-24 May 2006 Page(s):4 pp.

230. Yu-Jen Chen; Chen-Han Tsai; Liang-Gee Chen; ¡§Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

231. Chi-Sun Tang; Chen-Han Tsai; Shao-Yi Chien; Liang-Gee Chen; ¡§Algorithm and hardware architecture design for weighted prediction in H.264/MPEG-4 AVC,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

232. You-Ming Tsao; Chi-Ling Wu; Shao-Yi Chien; Liang-Gee Chen; ¡§Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems,¡¨ Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, 21-24 May 2006 Page(s):4 pp.

233. Yi-Hau Chen; Ching-Yeh Chen; Chih-Chi Cheng; Liang-Gee Chen; ¡§Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME,¡¨ Multimedia and Expo, 2006 IEEE International Conference on, July 2006 Page(s):365 ¡V 368

234. Jing-Ying Chang; Chao-Chung Cheng; Shao-Yi Chien; Liang-Gee Chen; ¡§Relative Depth Layer Extraction for Monoscopic Video by Use of Multidimensional Filter,¡¨ Multimedia and Expo, 2006 IEEE International Conference on, July 2006 Page(s):221 ¡V 224

235. Yu-Han Chen; Tung-Chien Chen; Liang-Gee Chen; ¡§Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile Application,¡¨ Multimedia and Expo, 2006 IEEE International Conference on, July 2006 Page(s):281 ¡V 284

236. Chuan-Yung Tsai; Tung-Chien Chen; Liang-Gee Chen; ¡§Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder,¡¨ Multimedia and Expo, 2006 IEEE International Conference on, July 2006 Page(s):1941 ¡V 1944

237. Wan-Yu Chen; Yu-Lin Chang; Hsu-Kuang Chiu; Shao-Yi Chien; Liang-Gee Chen; ¡§Real-Time Depth Image based Rendering Hardware Accelerator for Advanced Three Dimensional Television System,¡¨ Multimedia and Expo, 2006 IEEE International Conference on, July 2006 Page(s):2069 ¡V 2072

238. Y.-W. Chang, C.-C. Cheng, C.-C. Cheng, H.-C. Fang, and L.-G. Chen, ¡§Design and Implementation of JPEG 2000 Codec with Bit-Plane Scalable Architecture¡¨, Signal by IEEE Workshop on Signal Processing Systems (SiPS 2006), Banff, Canada, Oct. 2006, pp. 432~437

239. Yi-Min Tsai, Yu-Lin Chang, and Liang-Gee Chen, "Block-based Vanishing Line and Vanishing Point Detection for 3D Scene Reconstruction, " in 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006)

240. Chen, W.Y. and Ding, L.F. and Chen, L.G., ¡§Fast luminance and chrominance correction based on motion compensated linear regression for multi-view video coding,¡¨ SPIE 19th Annual Symposium on Electronics Imaging, Visual Communications and Image Processing 2007 (VCIP 2007), Feb, 2007

241. Chen, Y.H. and Lin, C.H. and Chen, C.Y. and Chen, L.G., ¡§Fast prediction algorithm of adaptive GOP structure for SVC,¡¨ SPIE 19th Annual Symposium on Electronics Imaging, Visual Communications and Image Processing 2007 (VCIP 2007), Feb, 2007

242. Tsai, Y.M. and Chang, Y.L. and Chen, L.G., ¡§Symmetric trinocular dense disparity estimation for car surrounding camera array,¡¨ SPIE 19th Annual Symposium on Electronics Imaging, Visual Communications and Image Processing 2007 (VCIP 2007), Feb, 2007

243. Tsai, C.Y., Chung, C.H., Chen, Y.H., Chen, T.C., and Chen, L.G., ¡§Low Power Cache Algorithm and Architecture Design for Fast Motion Estimation in H.264/AVC Encoder System,¡¨ Acoustics, Speech and Signal Processing, 2007. ICASSP 2007. IEEE International Conference on, April 2007

244. Chen, Y.J. and Tsai, C.H. and Chen, L.G., ¡§Novel Configurable Architecture of ML-Decomposed Binary Arithmetic Encoder for Multimedia Applications,¡¨ VLSI Design, Automation and Test 2007 (VLSI-DAT 2007), International Symposium on, April 2007

245. Tsung, P.K. and Ding, L.F. and Chen, W.Y. and Chien, S.Y. and Chen, T.C. and Chen, L.G., ¡§System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint,¡¨ Circuits and Systems, 2007 (ISCAS 2007), IEEE International Symposium on, pp. 1001-1004, May 2007

246. Li-Fu Ding, Pei-Kuei Tsung, Shao-Yi Chien,Wei-Yin Chen, and Liang-Gee Chen, ¡§COMPUTATION-FREE MOTION ESTIMATION WITH INTER-VIEW MODE DECISION FOR MULTIVIEW VIDEO CODING,¡¨ 3DTV-CONFERENCE, May 2007

247. Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Shao-Yi Chien and Liang-Gee Chen, ¡§2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications,¡¨ Symposium on VLSI Circuits, June 2007.

248. You-Ming Tsao, Chin-Hsiang Chang, Yu-Cheng Lin, Shao-Yi Chien, and Liang-Gee Chen, ¡§An 8.6mW 12.5Mvertices/s 800MOPS 8.91mm2 Stream Processor Core for Mobile Graphics and Video Applications,¡¨ Symposium on VLSI Circuits, June 2007

II. Local Conference

1. L.-G. Chen, C.-Y. Chang, Y.-K. Su, and T.-S. Wu, ¡§Growth and characterization of GaA, epitaxial layer by low pressure MOVPE,¡¨ in Proceedings of Electronic Devices and Materials Symposium, pp. 151-154, ROC, 1981.

2. L.-G. Chen, C.-Y. Chang, Y.-K. Su, and T.-S. Wu, ¡§Computer model of an injection laser with strip geometry,¡¨ in Proceedings of Electronic Devices and Material Symposium, pp. 404-410, ROC, 1982.

3. M.-H. Shih, J.-F. Wang, J.-Y. Lee, L.-G. Chen, and B.-D Liu, ¡§A fast and simple algorithm for verifying VLSI circuits,¡¨ in Proceedings of Electronic Devices and Materials Symposium, pp. 129-132, ROC, 1985.

4. H.-T. Lee, J.-F. Wang, J.-Y. Lee, L.-G. Chen, and B.-D. Liu, ¡§A hierarchical design rule filter for VLSI,¡¨ in Proceedings of Electronic Devices and Materials Symposium, pp. 141-144, ROC, 1985.

5. L.-G. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§VLSI array processor for low bit-rate video system,¡¨ in Proceedings of Telecommunication Symposium, pp. 311-316, Hsinchu, ROC, December 1990.

6. C.-H. Chen and L.-G. Chen, ¡§Self-adaptive control of tree saturation in multiprocessor system,¡¨ in Proceedings of 1991 National Computer Symposium (NCS), pp. 14-19, Chung-Li, December 1991.

7. T.-H. Chen, L.-G. Chen, and Y.-S. Jehng, ¡§A cost-effective fault-tolerant design of VLSI-based arithmetic units using partitioning technique,¡¨ in Proceedings of 1991 National Computer Symposium (NCS), pp. 132-137, Chung-Li, December 1991.

8. P.-J. Huang and L.-G. Chen, ¡§Processor design of fuzzy reasoning,¡¨ in Proceedings of the First Conference on Fuzzy Theorem and Applications, Hsin-Chu, June 1993.

9. S.-C. Huang, L.-G. Chen, and T.-H. Chen, ¡§Architecture design for LNS unit,¡¨ in Proceedings of 1993 National Computer Symposium (NCS), December 1993.

10. J.-C. Kuo, T.-H. Chen, and L.-G. Chen, ¡§A verification system for high-level synthesis,¡¨ in Proceedings of 1993 National Computer Symposium (NCS), December 1993.

11. R.-X Chen, L.-G. Chen, and M.-J. Chen, ¡§An I-phone system implementation using CPLD and low bit-rate speech coder,¡¨ in Proceedings of the 8th VLSI/CAD Symposium, August 1997.

12. G.-S. Lin and L.-G. Chen, ¡§Motion estimator design for H263,¡¨ in Proceedings of the 8th VLSI/CAD Symposium, August 1997.

13. Y.-L. Chu, L.-G. Chen, and P.-C. Wu, ¡§A new architecture for discrete wavelet transform,¡¨ in Proceedings of the 8th VLSI/CAD Symposium, August 1997.

14. R.-J. Wu, T.-H. Tsai, and L.-G. Chen ¡§Design and implementation of a MPEG-2 audio decoder with embedded RISC core,¡¨ in Proceedings of the 9th VLSI/CAD Symposium, August 1998.

15. S.-F. Shen and L.-G. Chen, ¡§Efficient design of H263+ motion estimation chip,¡¨ in Proceedings of the 9th VLSI/CAD Symposium, August 1998.

16. R.-X. Chen and L.-G. Chen, ¡§Design and implementation of FPGA wheelchair controller,¡¨ in Proceedings of the 10th VLSI/CAD Symposium, August 1999.

17. H.-C. Chang and L.-G. Chen, ¡§Efficient architecture design for MPEG-4 video shape coding,¡¨ in Proceedings of the 10th VLSI/CAD Symposium, August 1999.

18. T.-C. Wang and L.-G. Chen, ¡§Low power motion estimation architecture and implementation,¡¨ in Proceedings of the 10th VLSI/CAD Symposium, August 1999.

19. S.-Y. Ma, C.-K. Chen, S.-Y. Chien, and L.-G. Chen, ¡§Moving object segmentation algorithm and camera-on-a-chip system,¡¨ in Proceedings of the 10th VLSI/CAD Symposium, August 1999.

20. Y.-C. Wang, H.-C. Chang, and L.-G. Chen, ¡§Efficient design of binary motion estimation for MPEG-4 shape coding,¡¨ in Proceedings of the 11th VLSI/CAD Symposium, August 2000.

21. S.-F. Lin, W.-H. Chi, and L.-G. Chen, ¡§Virtual component model verification and hierarchical controller distribution strategy for system-on-chip design ¡V MPEG2 video decoder as an example,¡¨ in Proceedings of the 11th VLSI/CAD Symposium, August 2000.

22. R.-X. Chen and L.-G. Chen, ¡§Validation of embedded DSP system with reconfigurable interface reaction models,¡¨ in Proceedings of the 11th VLSI/CAD Symposium, August 2000.

23. P.-C. Tseng, C.-K. Chen, and L.-G. Chen, ¡§CDSP: a 16-bit digital signal processor for 3G wireless communications,¡¨ in Proceedings of the 11th VLSI/CAD Symposium, August 2000.

24. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§VLSI implementation of shape-adaptive discrete wavelet transform,¡¨ in Proceedings of the 12th VLSI/CAD Symposium, August 2001.

25. H.-H. Chen, C.-J. Lian, K.-F. Chen, and L.-G. Chen, ¡§Context-based adaptive arithmetic encoder design for JPEG2000,¡¨ in Proceedings of the 12th VLSI/CAD Symposium, August 2001.

26. S.-F. Lin, S.-C. Huang, F.-S. Yang, C.-W. Ku, and L.-G. Chen, ¡§An efficient linear-phase FIR filter architecture design for wireless embedded system,¡¨ in Proceedings of the 12th VLSI/CAD Symposium, August 2001.

27. Y.-C. Chang, C.-W. Hsu, W.-M. Chao, and L.-G. Chen, ¡§Architecture design of MPEG-4 FGS encoder,¡¨ in Proceedings of the 13th VLSI/CAD Symposium, August 2002.

28. B.-Y. Hsieh, Y.-W. Huang, S.-Y. Chien, S.-Y. Ma, and L.-G. Chen. ¡§Fast algorithm for intra prediction mode decision in MPEG-4 AVC/JVT/H.264,¡¨ in Proceedings of 2003 Symposium on Digital Life and Internet Technologies, September 2003.

29. C.-C. Cheng, C.-T. Huang, L.-G. Chen, "Wordlength and precision analysis of DWT hardware architectures," in Proceedings of VLSI Design/CAD Symposium 2004, Kenting, Taiwan, Aug. 2004.

30. Y.-J. Chen, C.-H. Tsai, and L.-G. Chen. ¡§Analysis and Architecture Design for Multi-Symbol Arithmetic Encoder in H.264/AVC,¡¨ in Proceedings of VLSI Design/CAD Symposium 2005, August 2005.

31. Ke-Chung Wu, Tung-Chien Chen, Yu-Han Chen, and Liang-Gee Chen, "Hybrid-mode embedded compression for H.264/AVC video coding system" in Proceedings of VLSI Design/CAD Symposium 2005, August 2005.

32. S.-F. Tsai, T.-C. Chen, Y.-H. Chen, L.-G. Chen, "FAST MOTION ESTIMATION FOR VIDEO WITH HIGH RESOLUTION" in Proceedings of VLSI Design/CAD Symposium 2005, August 2005.

(F) Workshop Presentation

1 Y.-S. Jehng, L.-G. Chen, and T.-M. Parng, ¡§ASG: automatic schematic generator,¡¨ in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.

2 L.-G. Chen and L.-G. Jeng, ¡§Module selection for DSP synthesis,¡¨ in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.

3 L.-G. Chen and K.-T. Chao, ¡§Tree height minimization for high level synthesis,¡¨ in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.

4 C.-T. Chen and L.-G. Chen, ¡§Systolic array architecture for neural networks learning based on recursive least squares,¡¨ in Proceedings of Workshop on Neural Networks, Taipei, December 1991.

5 Y.-S. Jehng, L.-G. Chen, T.-D. Chiueh, and T.-H. Chen, ¡§Realization of array architectures for hierarchical block matching algorithms,¡¨ in Proceedings of 1992 IEEE International Workshop on Intelligent Signal Processing and Communication System (ISPACS¡¦92), pp. 368-378, Taipei, ROC, March, 1992.

6 L.-G. Chen, Y.-C. Liu, and T.-D. Chiueh, ¡§Efficient motion compensation-block truncation coding for video communication,¡¨ in Proceedings of 1992 IEEE International Workshop on Intelligent Signal Processing and Communication System (ISPACS¡¦92), pp. 184-194, Taipei, ROC, March, 1992.

7 L.-G. Jeng and L.-G. Chen, ¡§Rate-optimal synthesis of recursive DSP algorithms on processor array by retiming and unfolding,¡¨ in Proceedings of 3rd VLSI/CAD Workshop, pp. 93-102, NanToung, ROC, March 1992.

8 L.-G. Chen, W.-D. Lee, and Y.-P. Lee, ¡§VLSI architectures of an adaptive Viterbi decoder,¡¨ in Proceedings of 3rd VLSI/CAD Workshop, pp. 276-284, NanToung, ROC, March 1992.

9 H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§Analysis and implementation of 2-D discrete transform chip,¡¨ in Proceedings of 3rd VLSI/CAD Workshop, pp. 244-255, NanToung, ROC, March 1992.

10 L.-G. Chen, Y.-S. Jehng, and T.-D. Chiueh, ¡§VLSI design of motion estimator for HDTV application,¡¨ in Proceedings of International Workshop on HDTV '92, Tokyo, November 1992.

11 L.-G. Jeng and L.-G. Chen, ¡§Synthesis of rate-optimal DSP algorithms by pipeline and minimum folding,¡¨ in Proceedings of the 6th International Workshop on High Level Synthesis, California, November 1992.

12 M.-J. Chen, Y.-P. Lee, L.-G. Chen, and T.-D. Chiueh, ¡§VLSI implementation of real-time motion estimation for video compression,¡¨ in Proceedings of 4th VLSI/CAD Workshop, Taichung, August 1993.

13 W.-T. Chen, and L.-G. Chen, ¡§The Viterbi decoder architecture design,¡¨ in Proceedings of 4th VLSI/CAD Workshop, Taichung, August 1993.

14 H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, ¡§VLSI architecture design of 3-step search block-matching algorithm for video coding,¡¨ in Proceedings of 1993 HD-MEDIA Technology and Applications Workshop, pp. S1-1- S1-6, Taipei, ROC, October 1993.

15 T.-D. Chiueh, T.-T. Tang, and L.-G. Chen, ¡§Vector quantization using tree-structured self organizing feature maps,¡¨ in Proceedings of International Workshop on Applications of Neural Networks to Telecommunications, Princeton, October 1993.

16 C.-W. Ku, L.-G. Chen, T.-D. Chiueh, and, H.-M. Jong, ¡§A folded-tree architecture and its implementation of a flexible vector quantization,¡¨ in Proceedings of 5th VLSI/CAD Workshop, pp. 48-53, August 1994.

17 Y.-P. Lee, L.-G. Chen, H.-M. Jong, D.-L. Huang, and K.-N. Jeng, ¡§Video coding architecture for multimedia applications,¡¨ in Proceedings of 5th VLSI/CAD Workshop, pp. 101-106, August 1994.

18 D.-L. Huang, L.-G. Chen, C.-W. Ku, and T.-D. Chiueh, ¡§Design and implementation of a classified vector quantization for image coding,¡¨ in Proceedings of 1994 HD-Media Technology and Applications Workshop, October 1994.

19 Y.-W. Chen, L.-G. Chen, and M.-J. Chen, ¡§Architecture design and hardware implementation for the contour tracer,¡¨ in Proceedings of the 6th VLSI Design/CAD Symposium, pp. 265-268, August 1995.

20 L.-G. Chen, P.-C. Wu, and T.-D. Chiueh, ¡§Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks,¡¨ in Proceedings of 1995 IEEE VLSI Signal Processing Workshop, pp. 342-353, Japan, October 1995.

21 Y.-P. Lee, L.-G. Chen, J.-Y. Wu, and C.-W. Ku, ¡§Design of decoder module for a MPEG-2 decoder,¡¨ in Proceedings of HD-Media Workshop, Taipei, November 1995.

22 H.-T. Chen, and L.-G. Chen, ¡§An efficient flow control and error control for video transmission over LAN,¡¨ in Proceedings of HD-Media Workshop, Taipei, November 1995.

23 Y.-W. Chen and L.-G. Chen, ¡§A high compression video coding system using adaptive region-classified vector quantization,¡¨ in Proceedings of HD-Media Workshop, Taipei, November 1995.

24 L.-G. Chen, M.-J. Chen, K.-N. Cheng, and M.-C. Chen, ¡§Block-matching array architectures with a joint optimized execution latency and i/o bandwidth,¡¨ in Proceedings of 1995 International Workshop on HDTV and the Evolution of Television, Taipei, Taiwan, November 1995.

25 C.-W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, ¡§Arbitrarily shaped transform of segmented motion field for very low bit-rate coding system,¡¨ in Proceedings of 1995 International Workshop on HDTV and the Evolution of Television, Taipei, Taiwan, November 1995.

26 J.-Y. Wu and L.-G. Chen, ¡§VHDL design methodology in variable length decoder for MPEG-2,¡¨ in Proceedings of 7th VLSI design/CAD Symposium, August 1996, Taiwan.

27 L.-G. Chen, S. Liao, and G.-S. Lin, ¡§A low-power direct digital frequency synthesizer chip,¡¨ in Proceedings of 7th VLSI design/CAD Symposium, August 1996, Taiwan.

28 C.-T. Chen and L.-G. Chen, ¡§Software techniques for realtime video processing,¡¨ in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.

29 C.-H. Chen and L.-G. Chen, ¡§Implementation of visual telephones on PC platforms,¡¨ in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.

30 J.-H. Shen, C.-T. Chen and L.-G. Chen, ¡§The polygon shading chip design for 3D graphics,¡¨ in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.

31 Y.-P. Lee, L.-G. Chen, M.-J. Chen, and C.-W. Ku, ¡§A new implementation on 8x8 2D DCT/IDCT,¡¨ in Proceedings of 1996 IEEE Workshop on VLSI Signal Processing, San Francisco, October 1996.

32 P.-C. Wu, L.-G. Chen, and T.-H. Tsai, ¡§A new method for reduction of blocking effects in subband/wavelet image coding,¡¨ in Proceedings of 1997 Workshop on Consumer Electronics: Digital Video and Multimedia, Taipei, October 1997.

33 C.-H. Chen, L.-G. Chen, and H.-C. Chang, ¡§Region-based blurring to reduce bitrate in very low bitrate video coding,¡¨ in Proceedings of 1997 Workshop on Consumer Electronics: Digital Video and Multimedia, Taipei, October 1997.

34 T.-H. Tsai and L.-G. Chen, ¡§Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture,¡¨ in Proceedings of 1997 IEEE Workshop on Signal Processing Systems (SiPS¡¦97), Leicester, UK, November 1997.

35 R.-X. Chen, M.-J. Chen, and L.-G. Chen, ¡§The system implementation of I-phone hardware by using low bit rate speech coding,¡¨ in Proceedings of 1997 IEEE Workshop on Signal Processing Systems (SiPS¡¦97), Leicester, UK, November 1997.

36 L.-G. Chen, J.-Y. Jiu, and H.-C. Chang, ¡§Design and implementation of Low Power DCT Chip for Portable Multimedia Terminal,¡¨ in Proceedings of 1998 IEEE Workshop on Signal Processing Systems (SiPS¡¦98), Boston, October 1998.

37 C.-W. Ku, C.-K. Chen, L.-G. Chen, and F.-Y. Kuo, ¡§Low power strategy about correlator array for CDMA baseband processor,¡¨ in Proceedings of 1999 IEEE Workshop on Signal Processing Systems (SiPS¡¦99), Taipei, Taiwan, October 1999.

38 T.-H. Tsai, L.-G. Chen, and R.-J. Wu, ¡§A cost-effective design for MPEG2 audio decoder with embedded RISC core,¡¨ in Proceedings of 1999 IEEE Workshop on Signal Processing Systems (SiPS¡¦99), Taipei, Taiwan, October 1999.

39 H.-C. Chang, Y.-C. Wang, M.-Y. Hsu and L.-G. Chen, ¡§Efficient algorithms and architectures for MPEG-4 object-based video coding,¡¨ in Proceedings of 2000 IEEE Workshop on Signal Processing System (SiPS 2000), Lafayette, Louisiana, October 2000.

40 S.-Y. Ma, C.-F. Shen, and L.-G. Chen, ¡§An efficient motion estimation algorithm for real-time MPEG-4 video encoding on multimedia processors,¡¨ in Proceedings of 2nd Workshop and Exhibition on MPEG-4, pp. 67-70, June 2001.

41 S.-F. Lin, S.-C. Huang, F.-S. Yang, C.-W. Ku, and L.-G. Chen, ¡§An efficient linear-phase FIR filter architecture design for wireless embedded system,¡¨ in Proceedings of 2001 IEEE Workshop on Signal Processing System (SiPS 2001), Antwerp, Belgium, September, 2001.

42 Y.-C. Chang, W.-H. Ji, and L.-G. Chen, ¡§A memory-efficient MPEG-4 simple scalable profile decoder with optimized motion compensation,¡¨ in Proceedings of 3rd Workshop and Exhibition on MPEG-4, June 2002.

43 S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, and L.-G. Chen, ¡§Algorithm and architecture of video segmentation hardware system with a programmable PE array,¡¨ in Proceedings of 2002 IEEE Workshop on Signal Processing System (SiPS 2002), September 2002.

44 S.-Y. Chien, C.-Y. Chen, Y.-W. Huang, and L.-G. Chen, ¡§Efficient sprite generation algorithm with frame skipping and multiple sprites techniques,¡¨ in Proceedings of Workshop on Consumer Electronics, December 2002.

45 P.-C. Tseng, C.-T. Huang, and L.-G. Chen, ¡§Reconfigurable discrete wavelet transform architecture for advanced multimedia systems,¡¨ in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.

46 P.-C. Tseng and L.-G. Chen, ¡§Perspectives of multimedia SoC,¡¨ in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.

47 C.-T. Huang, P.-C. Tseng, and L.-G. Chen, ¡§VLSI architecture for discrete wavelet transform based on B-spline factorization,¡¨ in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.

48 C.-Y. Chen, S.-Y Chien, W. M. Chao, Y.-W. Huang, and L.-G. Chen, ¡§Analysis of global motion estimation and compensation in MPEG-4 advanced simple profile,¡¨ in Proceedings of Workshop on Consumer Electronics, Tainan, Taiwan, December 2003.

49 S.-S. Lin, P.-C. Tseng, C.-P. Lin, and L.-G. Chen, ¡§Content-aware diversity-based motion estimation algorithm,¡¨ to appear, 2003 IEEE Workshop on Signal Processing Systems (SiPS 2004), Austin, Texas, USA, October 2004.

50 Y.-C. Chang, W.-M. Chao, and L.-G. Chen, ¡§Platform-based MPEG-4 video encoder SOC design,¡¨ to appear, 2003 IEEE Workshop on Signal Processing Systems (SiPS 2004), Austin, Texas, USA, October 2004.