Publication List of Prof. Liang-Gee Chen

(A) Refereed Paper

    1. H.-M. Jong, L.-G. Chen and T.-D. Chiueh, “Analysis and implementation of 2-D discrete cosine transform chip,” on Bulletin of the College of Engineering , NTU.
    2. L.-G. Chen, L.-G. Jeng, and K.-T. Tsao, “Language System for DSP Silicon Compiler,” Proceedings of the National Science Council, Part. A., vol. 16, no.5, pp. 374-382, September 1992.
    3. L.-G. Chen and C.-T. Chao, “Intelligent digital filter synthesis system,” Journal of Chinese Institute of Engineers, vol. 16, no. 1, pp. 117-133, January 1993.
    4. L.-G. Chen, T.-J. Lin, and L.-G. Jeng, “Application-specific chip design using behavioral silicon compiler,” Journal of Chinese Institute of Engineers, vol. 17, no. 1, pp.107-112, 1994.

(B) Books

  1. L.-G. Chen, L.-G. Jeng, K.-T. Chao, D.-J. Lin, and C.-T. Chao, “CAD system for an application-specific DSP processor design,” in Section: CAD for DSP of VLSI Logic Synthesis and Design, ISBN90-51990460, Edited by Robert W. Dutton, IOS Press, Netherlands, 1991.
  2. Y.-S. Jehng, L.-G. Chen, T.-D. Chiueh, W. Chen, and H.-M. Jong, “Pipeline interleaving design for FIR, IIR, and FFT,” in Section: CAD for DSP of VLSI Logic Synthesis and Design, ISBN90-51990460, Edited by Robert W. Dutton, IOS Press, Netherlands, 1991.
  3. T.-A. Michel, and L.-G. Chen, “A real-time decoder for the scene adaptive video coding system,” AT&T Bell 11224-941014-01TM, Work Project No. 311402-2399, File case 38794-43, Technical Memorandum, 1994.
  4. L.-G. Chen and C.-W. Ku, “Multimedia visual telephone system,” chapter in the book “Multimedia Technology for Applications” edited by B. Sheu and M. Ismail, IEEE Press, 1997.
  5. C.-W. Ku, F.-Y. Kuo, L.-G. Chen and C.-K. Chen, “Low powered multi-code correlator for IMT-2000,” Chapter in the book “Wireless Communication Systems” edited by Raymond Steele, John Wiley published, 1999.
  6. “1998 IEEE Workshop on Signal Processing Systems (SiPS’98)-Design and Implementation” edited by E. S. Monolakos, A. Chandrakasan, L.-G. Chen, W. P. Burleson, and K. Konstantinides, IEEE Press, 1998. ISBN: 0-7803-4997-0
  7. “1999 IEEE Workshop on Signal Processing Systems (SiPS’99)-Design and Implementation” edited by L.-G. Chen, H.-M. Hang, and I. Kuroda, IEEE Press, 1999. ISBN: 0-7803-5650-0
  8. “VLSI DESIGN OF WAVELET TRANSFORM, Analysis, Architecture, and Design Examples,” by Liang-Gee Chen, Chao-Tsung Huang, Ching-Yeh Chen & Chih-Chi Cheng, ISBN 978-1-86094-673-8, Dec. 2006 (Imperial College Press)

(C) Book Chapter

  1. “Essential Issues in SOC Design, Designing Complex Systems-on-Chip,” Lin, Youn-Long Steve (Ed.), ISBN-10: 1-4020-5351-7, 2007 (Springer)
  2. “Chapter 3: Multimedia IP Development – Image and Video Codecs” by Liang-Gee Chen, Chung-Jr Lian, Ching-Yeh Chen, and Tung-Chien Chen

(D) Patents

  1. 陳良基, 賴永康, 劉遠禎, 李永斌, “針對三步驟階搜尋區塊比對演算法之資料環陣列架構,” no. 102678, Taiwan ROC, 1999.05.01- 2017.09.04
  2. 陳良基, 蔡宗漢, 吳仁智, “在一電腦系統中對一字碼解群組的方法,” no. 107015, Taiwan ROC, 1999.08.11- 2018.04.29
  3. 陳良基, 賴永康, 李永斌, “應用三步驟階層式搜尋區塊比對法之移動估計器,” no. 110352, Taiwan ROC, 1999.12.11- 2018.05.20
  4. 陳良基, 蔡宗漢, “於MPEG-II音頻訊號解碼中合成次頻帶濾波器的方法,” no. 110857, Taiwan ROC, 2000.01.01- 2018.07.31
  5. 劉深淵, 楊清淵, 陳良基, “高頻互補式金氧半雙模\多模前置分頻器,” no. 114359, Taiwan ROC, 2000.04.11- 2016.09.22
  6. 陳良基, 李永斌, 顧中威, 劉遠禎, “利用直接式的高輸出量與高度規則的二維8乘8離散餘弦轉換/反離散餘弦轉換之架構,” no. 118022, Taiwan ROC, 2000.06.21- 2018.03.02
  7. 陳良基, 馬仕毅, “CMOS主動像素感應器”, no. 117230, Taiwan ROC, 2000.07.01- 2018.12.13
  8. 陳良基, 劉遠禎, 李永斌, 吳柏成, 陳旭東, "於一電腦系統中壓縮彩色圖像及重建被壓縮彩色圖像的方法", no. 122435, Taiwan ROC, 2000.11.01- 2019.02.23
  9. 陳良基, 蔡宗漢, “適用於MPEG-II音頻訊號解碼之逆量化與多聲道處理之硬體架構及組成,” no. 102678, Taiwan ROC, 2001.03.06- 2018.08.03
  10. 陳良基, 吳柏成, “適用於二維離散波元轉換之硬體架構,” Taiwan ROC, 2002
  11. 陳良基, 馬仕逸, 簡韶逸, “從一系列視訊畫面切割其中移動物件形狀的方法,” no. 175447, Taiwan ROC, 2003
  12. 陳良基, 黃毓文, 簡韶逸, “用於移動估計的全域消除演算法及其硬體架構設計,” no. 177013, Taiwan ROC, 2003.04.01- 2022.04.11
  13. 陳良基, 王度智, “單一可變長度編碼器架構,” no. 184663, Taiwan ROC, 2003.08.21- 2021.11.05
  14. 陳良基, 黃朝宗, 曾博志, “用於提昇式離散小波轉換硬體實現之翻轉式演算法及其硬體架構,” no. 200668, Taiwan ROC, 2004.04.01 - 2022.07.11.
  15. 陳良基, 林世豐, “四圖場動像調適性解交錯,” Taiwan ROC, 2004.12.01-2023.05.15
  16. 陳良基, 張毓麟, “全域及局部適應性圖場去交錯系統與方法,” Taiwan ROC, 2005.06.11-2023.12.18
  17. 陳良基, 方弘吉, 張育瑋, “平行化嵌入式方塊編碼器及其編碼方法,” Taiwan ROC, 2005.12.21-2023.11.13
  18. 陳良基, 方弘吉, 張育瑋, “一種用於JPEG2000中的前壓縮位元-失真最佳化方法,” Taiwan ROC, 2007.10.11-2024.07.12
  19. 陳良基, 黃朝宗, 陳慶曄, 陳翊豪, “用於移動估計的等級C+資料重覆使用架構/ Level C+ Data Reuse Scheme for Motion Estimation,” 中華民國專利 I272548, 2007.02.01-2025.08.21
  20. C.-Y. Yang, S.-I. Liu, and L.-G. Chen, “High-frequency CMOS dual/multi modules prescaler,” US. 6,094,466, 2000.07.25- 2017.01.10
  21. L.-G. Chen, Y.-K. Lai, Y.-C. Liu, and Y.-P. Lee, “Array architecture with data-rings for 3-step hierarchical search block matching algorithm,” US. 6,118,901, 2000.09.12- 2017.10.31
  22. L.-G. Chen, Y.-C. Liu, Y.-P. Lee, P.-C. Wu, and H.-T. Chen, “Methods for compressing and re-constructing a color image in a computer system,” US. 6,151,409, 2000.11.21- 2018.03.13
  23. L.-G. Chen, Y.-K. Lai, and Y.-P. Lee, “Motion estimator employing a three-step hierarchical search block-matching algorithm,” US. 6,160,850, 2000.12.12- 2018.08.03
  24. L.-G. Chen and T.-H. Tsai, “Architecture for inverse quantization and multichannel processing in MPEG-II audio decoding,” US. 6,166,663, 2000.12.26- 2019.07.16
  25. Chen; Liang-Gee, Tsai; Tsung-Han, Liu; Yuan-Chen, “Synthesis subband filter in MPEG-II audio decoding,” US. 6,199,039, 2001
  26. L.-G. Chen and S.-Y. Ma, “CMOS active pixel sensor,” US. 6,215,113, 2001.04.10- 2019.04.22
  27. Chen; Liang-Gee, Tsai; Tsung-Han, Wu; Ren-Jr, “Method of degrouping a codeword in MPEG-II audio decoding by iterative addition and subtraction,” US. 6370501, 2002
  28. L.-G. Chen and T.-C. Wang, “Universal variable code (UVLC) encoder architecture,” US. 6,542,095B1, 2003.04.01- 2021.12.13
  29. Chen; Liang-Gee, Wu; Po-Cheng, Liu; Yuan-Chen, Lai; Yeong-Kang, “Architecture for performing two-dimensional discrete wavelet transform,” US. 6,587,589, 2003
  30. Chen; Liang-Gee, Huang; Chao-Tsung, Tseng; Po-Chih, “Flipping algorithm to architectures of hardware realization for lifting-based DWT,” US. 7,076,515, 2006
  31. Chen; Liang-Gee, Lin; Shyh-Feng, Chou; Patrick, Chang; Yu-Lin, Chen; Ryan, “Four-field motion adaptive de-interlacing,” US. 7,129,989, 2006

(E) Conference Papers

(F) Workshop Presentation

  1. Y.-S. Jehng, L.-G. Chen, and T.-M. Parng, “ASG: automatic schematic generator,” in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.
  2. L.-G. Chen and L.-G. Jeng, “Module selection for DSP synthesis,” in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.
  3. L.-G. Chen and K.-T. Chao, “Tree height minimization for high level synthesis,” in Proceedings of 2nd VLSI/CAD Workshop, Taiwan, ROC, March 1990.
  4. C.-T. Chen and L.-G. Chen, “Systolic array architecture for neural networks learning based on recursive least squares,” in Proceedings of Workshop on Neural Networks, Taipei, December 1991.
  5. Y.-S. Jehng, L.-G. Chen, T.-D. Chiueh, and T.-H. Chen, “Realization of array architectures for hierarchical block matching algorithms,” in Proceedings of 1992 IEEE International Workshop on Intelligent Signal Processing and Communication System (ISPACS’92), pp. 368-378, Taipei, ROC, March, 1992.
  6. L.-G. Chen, Y.-C. Liu, and T.-D. Chiueh, “Efficient motion compensation-block truncation coding for video communication,” in Proceedings of 1992 IEEE International Workshop on Intelligent Signal Processing and Communication System (ISPACS’92), pp. 184-194, Taipei, ROC, March, 1992.
  7. L.-G. Jeng and L.-G. Chen, “Rate-optimal synthesis of recursive DSP algorithms on processor array by retiming and unfolding,” in Proceedings of 3rd VLSI/CAD Workshop, pp. 93-102, NanToung, ROC, March 1992.
  8. L.-G. Chen, W.-D. Lee, and Y.-P. Lee, “VLSI architectures of an adaptive Viterbi decoder,” in Proceedings of 3rd VLSI/CAD Workshop, pp. 276-284, NanToung, ROC, March 1992.
  9. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, “Analysis and implementation of 2-D discrete transform chip,” in Proceedings of 3rd VLSI/CAD Workshop, pp. 244-255, NanToung, ROC, March 1992.
  10. L.-G. Chen, Y.-S. Jehng, and T.-D. Chiueh, “VLSI design of motion estimator for HDTV application,” in Proceedings of International Workshop on HDTV '92, Tokyo, November 1992.
  11. L.-G. Jeng and L.-G. Chen, “Synthesis of rate-optimal DSP algorithms by pipeline and minimum folding,” in Proceedings of the 6th International Workshop on High Level Synthesis, California, November 1992.
  12. M.-J. Chen, Y.-P. Lee, L.-G. Chen, and T.-D. Chiueh, “VLSI implementation of real-time motion estimation for video compression,” in Proceedings of 4th VLSI/CAD Workshop, Taichung, August 1993.
  13. W.-T. Chen, and L.-G. Chen, “The Viterbi decoder architecture design,” in Proceedings of 4th VLSI/CAD Workshop, Taichung, August 1993.
  14. H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, “VLSI architecture design of 3-step search block-matching algorithm for video coding,” in Proceedings of 1993 HD-MEDIA Technology and Applications Workshop, pp. S1-1- S1-6, Taipei, ROC, October 1993.
  15. T.-D. Chiueh, T.-T. Tang, and L.-G. Chen, “Vector quantization using tree-structured self organizing feature maps,” in Proceedings of International Workshop on Applications of Neural Networks to Telecommunications, Princeton, October 1993.
  16. C.-W. Ku, L.-G. Chen, T.-D. Chiueh, and, H.-M. Jong, “A folded-tree architecture and its implementation of a flexible vector quantization,” in Proceedings of 5th VLSI/CAD Workshop, pp. 48-53, August 1994.
  17. Y.-P. Lee, L.-G. Chen, H.-M. Jong, D.-L. Huang, and K.-N. Jeng, “Video coding architecture for multimedia applications,” in Proceedings of 5th VLSI/CAD Workshop, pp. 101-106, August 1994.
  18. D.-L. Huang, L.-G. Chen, C.-W. Ku, and T.-D. Chiueh, “Design and implementation of a classified vector quantization for image coding,” in Proceedings of 1994 HD-Media Technology and Applications Workshop, October 1994.
  19. Y.-W. Chen, L.-G. Chen, and M.-J. Chen, “Architecture design and hardware implementation for the contour tracer,” in Proceedings of the 6th VLSI Design/CAD Symposium, pp. 265-268, August 1995.
  20. L.-G. Chen, P.-C. Wu, and T.-D. Chiueh, “Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks,” in Proceedings of 1995 IEEE VLSI Signal Processing Workshop, pp. 342-353, Japan, October 1995.
  21. Y.-P. Lee, L.-G. Chen, J.-Y. Wu, and C.-W. Ku, “Design of decoder module for a MPEG-2 decoder,” in Proceedings of HD-Media Workshop, Taipei, November 1995.
  22. H.-T. Chen, and L.-G. Chen, “An efficient flow control and error control for video transmission over LAN,” in Proceedings of HD-Media Workshop, Taipei, November 1995.
  23. Y.-W. Chen and L.-G. Chen, “A high compression video coding system using adaptive region-classified vector quantization,” in Proceedings of HD-Media Workshop, Taipei, November 1995.
  24. L.-G. Chen, M.-J. Chen, K.-N. Cheng, and M.-C. Chen, “Block-matching array architectures with a joint optimized execution latency and i/o bandwidth,” in Proceedings of 1995 International Workshop on HDTV and the Evolution of Television, Taipei, Taiwan, November 1995.
  25. C.-W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, “Arbitrarily shaped transform of segmented motion field for very low bit-rate coding system,” in Proceedings of 1995 International Workshop on HDTV and the Evolution of Television, Taipei, Taiwan, November 1995.
  26. J.-Y. Wu and L.-G. Chen, “VHDL design methodology in variable length decoder for MPEG-2,” in Proceedings of 7th VLSI design/CAD Symposium, August 1996, Taiwan.
  27. L.-G. Chen, S. Liao, and G.-S. Lin, “A low-power direct digital frequency synthesizer chip,” in Proceedings of 7th VLSI design/CAD Symposium, August 1996, Taiwan.
  28. C.-T. Chen and L.-G. Chen, “Software techniques for realtime video processing,” in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.
  29. C.-H. Chen and L.-G. Chen, “Implementation of visual telephones on PC platforms,” in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.
  30. J.-H. Shen, C.-T. Chen and L.-G. Chen, “The polygon shading chip design for 3D graphics,” in Proceedings of 1996 HD-Media Workshop, Taipei, October 1996.
  31. Y.-P. Lee, L.-G. Chen, M.-J. Chen, and C.-W. Ku, “A new implementation on 8x8 2D DCT/IDCT,” in Proceedings of 1996 IEEE Workshop on VLSI Signal Processing, San Francisco, October 1996.
  32. P.-C. Wu, L.-G. Chen, and T.-H. Tsai, “A new method for reduction of blocking effects in subband/wavelet image coding,” in Proceedings of 1997 Workshop on Consumer Electronics: Digital Video and Multimedia, Taipei, October 1997.
  33. C.-H. Chen, L.-G. Chen, and H.-C. Chang, “Region-based blurring to reduce bitrate in very low bitrate video coding,” in Proceedings of 1997 Workshop on Consumer Electronics: Digital Video and Multimedia, Taipei, October 1997.
  34. T.-H. Tsai and L.-G. Chen, “Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture,” in Proceedings of 1997 IEEE Workshop on Signal Processing Systems (SiPS’97), Leicester, UK, November 1997.
  35. R.-X. Chen, M.-J. Chen, and L.-G. Chen, “The system implementation of I-phone hardware by using low bit rate speech coding,” in Proceedings of 1997 IEEE Workshop on Signal Processing Systems (SiPS’97), Leicester, UK, November 1997.
  36. L.-G. Chen, J.-Y. Jiu, and H.-C. Chang, “Design and implementation of Low Power DCT Chip for Portable Multimedia Terminal,” in Proceedings of 1998 IEEE Workshop on Signal Processing Systems (SiPS’98), Boston, October 1998.
  37. C.-W. Ku, C.-K. Chen, L.-G. Chen, and F.-Y. Kuo, “Low power strategy about correlator array for CDMA baseband processor,” in Proceedings of 1999 IEEE Workshop on Signal Processing Systems (SiPS’99), Taipei, Taiwan, October 1999.
  38. T.-H. Tsai, L.-G. Chen, and R.-J. Wu, “A cost-effective design for MPEG2 audio decoder with embedded RISC core,” in Proceedings of 1999 IEEE Workshop on Signal Processing Systems (SiPS’99), Taipei, Taiwan, October 1999.
  39. H.-C. Chang, Y.-C. Wang, M.-Y. Hsu and L.-G. Chen, “Efficient algorithms and architectures for MPEG-4 object-based video coding,” in Proceedings of 2000 IEEE Workshop on Signal Processing System (SiPS 2000), Lafayette, Louisiana, October 2000.
  40. S.-Y. Ma, C.-F. Shen, and L.-G. Chen, “An efficient motion estimation algorithm for real-time MPEG-4 video encoding on multimedia processors,” in Proceedings of 2nd Workshop and Exhibition on MPEG-4, pp. 67-70, June 2001.
  41. S.-F. Lin, S.-C. Huang, F.-S. Yang, C.-W. Ku, and L.-G. Chen, “An efficient linear-phase FIR filter architecture design for wireless embedded system,” in Proceedings of 2001 IEEE Workshop on Signal Processing System (SiPS 2001), Antwerp, Belgium, September, 2001.
  42. Y.-C. Chang, W.-H. Ji, and L.-G. Chen, “A memory-efficient MPEG-4 simple scalable profile decoder with optimized motion compensation,” in Proceedings of 3rd Workshop and Exhibition on MPEG-4, June 2002.
  43. S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, and L.-G. Chen, “Algorithm and architecture of video segmentation hardware system with a programmable PE array,” in Proceedings of 2002 IEEE Workshop on Signal Processing System (SiPS 2002), September 2002.
  44. S.-Y. Chien, C.-Y. Chen, Y.-W. Huang, and L.-G. Chen, “Efficient sprite generation algorithm with frame skipping and multiple sprites techniques,” in Proceedings of Workshop on Consumer Electronics, December 2002.
  45. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, “Reconfigurable discrete wavelet transform architecture for advanced multimedia systems,” in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.
  46. P.-C. Tseng and L.-G. Chen, “Perspectives of multimedia SoC,” in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.
  47. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, “VLSI architecture for discrete wavelet transform based on B-spline factorization,” in Proceedings of 2003 IEEE Workshop on Signal Processing Systems (SiPS 2003), Seoul, Korea, August 2003.
  48. C.-Y. Chen, S.-Y Chien, W. M. Chao, Y.-W. Huang, and L.-G. Chen, “Analysis of global motion estimation and compensation in MPEG-4 advanced simple profile,” in Proceedings of Workshop on Consumer Electronics, Tainan, Taiwan, December 2003.
  49. S.-S. Lin, P.-C. Tseng, C.-P. Lin, and L.-G. Chen, “Content-aware diversity-based motion estimation algorithm,”in 2003 IEEE Workshop on Signal Processing Systems (SiPS 2004), Austin, Texas, USA, October 2004.
  50. Y.-C. Chang, W.-M. Chao, and L.-G. Chen, “Platform-based MPEG-4 video encoder SOC design,” in 2003 IEEE Workshop on Signal Processing Systems (SiPS 2004), Austin, Texas, USA, October 2004.

Publication List (Old Version)