[2] C.-C. Cheng, C.-H. Lin, C.-T. Li, S. Chang, C.-J. Hsu, and L.-G. Chen, "iVisual: An Intelligent Visual Sensor SoC with 2790fps CMOS Image Sensor and 205GOPS/W Vision Processor," in IEEE International Solid-State Circuits Conference (ISSCC), 2008. http://video.ee.ntu.edu.tw/publication/paper/[C][2008][ISSCC][Chih-Chi.Cheng][1].pdf

[3] Y.-H. Chen, T.-D. Chuang, Y.-J. Chen, C.-T. Li, C.-J. Hsu, S.-Y. Chien, and L.-G. Chen, "An H.264/AVC Scalable Extension and High Profile HDTV 1080p Encoder Chip," in Symposium on VLSI Circuits (SOVC), 2008.

[4] Y.-H. Chen, T.-D. Chuang, Y.-H. Chen, C.-H. Tsai, and L.-G. Chen, "Frame-Parallel Design Strategy for High Definition B-Frame H.264/AVC Encoder," in IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

[5] Y.-L. Chang, W.-Y. Chen, J.-Y. Chang, Y.-M. Tsai, C.-L. Lee, and L.-G. Chen, "Priority depth fusion for the 2D to 3D conversion system," in Three-Dimensional Image Capture and Applications, San Jose, CA, USA, 2008, pp. 680513-8. http://link.aip.org/link/?PSI/6805/680513/1

[6] J.-Y. Chang, T.-H. Wang, S.-Y. Chien, and L.-G. Chen, "Spatial-Temporal Consistent Labeling for Multi-Camera Multi-Object Surveillance System," in IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

[7] P.-K. Tsung, L.-F. Ding, W.-Y. Chen, S.-Y. Chien, T.-C. Chen, and L.-G. Chen, "System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint," in IEEE International Symposium on Circuits and Systems (ISCAS), 2007, pp. 1001-1004. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][ISCAS][Pei-Kuei.Tsung][1].pdf

[8] Y.-M. Tsao, C.-H. Chang, Y.-C. Lin, S.-Y. Chien, and L.-G. Chen, "An 8.6mW 12.5Mvertices/s 800MOPS 8.91mm² Stream Processor Core for Mobile Graphics and Video Applications," in Symposium on VLSI Circuits (SOVC), 2007, pp. 218-219. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][SOVC][You-Ming.Tsao][1].pdf

[9] Y.-M. Tsai, Y.-L. Chang, and L.-G. Chen, "Symmetric trinocular dense disparity estimation for car surrounding camera array," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2007, pp. 65081F-8. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][VCIP][Yi-Min.Tsai][1].pdf

[10] C.-Y. Tsai, C.-H. Chung, Y.-H. Chen, T.-C. Chen, and L.-G. Chen, "Low Power Cache Algorithm and Architecture Design for Fast Motion Estimation in H.264/AVC Encoder System," in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2007, pp. II-97-II-100. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][ICASSP][Chuan-Yuan.Tsai][1].pdf

[11] L.-F. Ding, P.-K. Tsung, S.-Y. Chien, W.-Y. Chen, and L.-G. Chen, "Computation-Free Motion Estimation With Inter-View Mode Decision For Multiview Video Coding," in 3DTV-Conference, 2007. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][3DTV][Li-Fu.Ding][1].pdf

[12] T.-D. Chuang, Y.-H. Chen, C.-H. Tsai, Y.-J. Chen, and L.-G. Chen, "Algorithm and Architecture Design for Intra Prediction in H.264/AVC High Profile," in Picture Coding Symposium (PCS), 2007. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][PCS][Tzu-Der.Chuang][1].pdf

[13] Y.-J. Chen, C.-H. Tsai, and L.-G. Chen, "Novel Configurable Architecture of ML-Decomposed Binary Arithmetic Encoder for Multimedia Applications," in International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2007, pp. 1-4. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][VLSI-DAT][Yu-Jen.Chen][1].pdf

[14] Y.-J. Chen, Y.-H. Chen, T.-D. Chuang, C.-T. Li, S.-Y. Chien, and L.-G. Chen, "Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension," in IEEE International Workshop on Signal Processing Systems (SiPS), 2007. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][SiPS][Yu-Jen.Chen][1].pdf

[15] Y.-H. Chen, C.-H. Lin, C.-Y. Chen, and L.-G. Chen, "Fast prediction algorithm of adaptive GOP structure for SVC," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2007, pp. 65080U-9. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][VCIP][Yi-Hau.Chen][1].pdf

[16] Y.-H. Chen, T.-D. Chuang, C.-Y. Tsai, Y.-J. Chen, and L.-G. Chen, "A Cost-Efficient Residual Prediction VLSI Architecture for H.264/AVC Scalable Extension," in Picture Coding Symposium (PCS), 2007. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][PCS][Yi-Hau.Chen][1].pdf

[17] Y.-H. Chen, T.-D. Chuang, Y.-J. Chen, and L.-G. Chen, "Bandwidth-efficient Encoder Framework for H.264/AVC Scalable Extension," in IEEE International Symposium on Multimedia (ISM), 2007. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][ISM][Yi-Hau.Chen][1].pdf

[18] W.-Y. Chen, L.-F. Ding, and L.-G. Chen, "Fast luminance and chrominance correction based on motion compensated linear regression for multi-view video coding," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2007, pp. 650823-8. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][VCIP][Wei-Yin.Chen][1].pdf

[19] T.-C. Chen, Y.-H. Chen, C.-Y. Tsai, S.-F. Tsai, S.-Y. Chien, and L.-G. Chen, "2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications," in Symposium on VLSI Circuits (SOVC), 2007, pp. 222-223. http://video.ee.ntu.edu.tw/publication/paper/[C][2007][SOVC][Tung-Chien.Chen][1].pdf

[20] Y.-M. Tsao, C.-L. Wu, S.-Y. Chien, and L.-G. Chen, "Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISCAS][You-Ming.Tsao][1].pdf

[21] Y.-M. Tsao, S.-Y. Chien, C.-H. Chang, C. Lian, Jr., and L.-G. Chen, "Low power programmable shader with efficient graphics and video acceleration capabilities for mobile multimedia applications," in International Conference on Consumer Electronics (ICCE), 2006, pp. 395-396. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICCE][You-Ming.Tsao][1].pdf

[22] Y.-M. Tsai, Y.-L. Chang, and L.-G. Chen, "Block-based Vanishing Line and Vanishing Point Detection for 3D Scene Reconstruction," in International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISPACS][Yi-Min.Tsai][1].pdf

[23] C.-Y. Tsai, T.-C. Chen, and L.-G. Chen, "Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder," in IEEE International Conference on Multimedia and Expo (ICME), 2006, pp. 1941-1944.

[24] C.-S. Tang, C.-H. Tsai, S.-Y. Chien, and L.-G. Chen, "Algorithm and hardware architecture design for weighted prediction in H.264/MPEG-4 AVC," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISCAS][Chi-Sun.Tang][1].pdf

[25] C.-P. Lin, P.-C. Tseng, Y.-T. Chiu, S.-S. Lin, C.-C. Cheng, H.-C. Fang, W.-M. Chao, and L.-G. Chen, "A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications," in IEEE International Conference on Solid-State Circuits (ISSCC), 2006, pp. 1626-1635. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISSCC][Chia-Ping.Lin][1].pdf

[26] C.-C. Cheng, C.-T. Huang, J.-Y. Chang, and L.-G. Chen, "Line Buffer Wordlength Analysis for Line-Based 2-D DWT," in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICASSP][Chih-Chi.Cheng][1].pdf

[27] C.-C. Cheng, C.-Y. Chen, Y.-H. Chen, and L.-G. Chen, "Analysis and VLSI architecture of update step in motion-compensated temporal filtering," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006.

[28] Y.-J. Chen, C.-H. Tsai, and L.-G. Chen, "Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISCAS][Yu-Jen.Chen][1].pdf

[29] Y.-H. Chen, T.-C. Chen, C.-Y. Tsai, S.-F. Tsai, and L.-G. Chen, "Algorithm and Architecture Co-Design of Low-Power H.264 Baseline Profile Encoder for mobile applications," in Picture Coding Symposium (PCS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][PCS][Yu-Han.Chen][1].pdf

[30] Y.-H. Chen, T.-C. Chen, and L.-G. Chen, "Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile Application," in IEEE International Conference on Multimedia and Expo (ICME), 2006, pp. 281-284. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICME][Yu-Han.Chen][1].pdf

[31] Y.-H. Chen, C.-Y. Chen, C.-C. Cheng, and L.-G. Chen, "Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME," in IEEE International Conference on Multimedia and Expo (ICME), 2006, pp. 365-368. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICME][Yi-Hau.Chen][1].pdf

[32] W.-Y. Chen, Y.-L. Chang, H.-K. Chiu, S.-Y. Chien, and L.-G. Chen, "Real-Time Depth Image based Rendering Hardware Accelerator for Advanced Three Dimensional Television System," in IEEE International Conference on Multimedia and Expo (ICME), 2006, pp. 2069-2072. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICME][Wan-Yu.Chen][1].pdf

[33] T.-C. Chen, C. Lian, Jr., and L.-G. Chen, "Hardware architecture design of an H.264/AVC video codec," in Asia and South Pacific Design Automation Conference (ASP-DAC), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ASP-DAC][Tung-Chien.Chen][1].pdf

[34] T.-C. Chen, Y.-H. Chen, S.-F. Tsai, and L.-G. Chen, "Architecture Design of Low Power Integer Motion Estimation for H. 264/AVC," in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICASSP][Tung-Chien.Chen][1].pdf

[35] T.-C. Chen, Y.-H. Chen, C.-Y. Tsai, and L.-G. Chen, "Low power and power aware fractional motion estimation of H.264/AVC for mobile applications," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006.

[36] C.-Y. Chen, Y.-H. Chen, C.-C. Cheng, and L.-G. Chen, "Frame-level data reuse for motion-compensated temporal filtering," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISCAS][Ching-Yeh.Chen][1].pdf

[37] C.-C. Chen, Y.-W. Chang, H.-C. Fang, and L.-G. Chen, "Analysis of scalable architecture for the embedded block coding in JPEG 2000," in IEEE International Symposium on Circuits and Systems (ISCAS), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISCAS][Chun-Chia.Chen][1].pdf

[38] Y.-W. Chang, H.-C. Fang, C.-C. Cheng, C.-C. Chen, C. Lian, Jr., S.-Y. Chien, and L.-G. Chen, "124 MSamples/s pixel-pipelined motion-JPEG 2000 codec without tile memory," in IEEE International Conference on Solid-State Circuits (ISSCC), 2006, pp. 1586-1595. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ISSCC][Yu-Wei.Chang][1].pdf

[39] Y.-W. Chang, H.-C. Fang, C.-C. Chen, and L.-G. Chen, "Design and Implementation Of Word-Level Embedded Block Coding Architecture in JPEG 2000 Decoder," in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2006. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICASSP][Yu-Wei.Chang][1].pdf

[40] Y.-W. Chang, C.-C. Chen, C.-C. Chen, H.-C. Fang, and L.-G. Chen, "Design and Implementation of JPEG 2000 Codec with Bit-Plane Scalable Architecture," in IEEE Workshop on Signal Processing Systems Design and Implementation (SIPS), 2006, pp. 428-433. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][SiPS][Yu-Wei.Chang][1].pdf

[41] J.-Y. Chang, C.-C. Cheng, S.-Y. Chien, and L.-G. Chen, "Relative Depth Layer Extraction for Monoscopic Video by Use of Multidimensional Filter," in IEEE International Conference on Multimedia and Expo (ICME), 2006, pp. 221-224. http://video.ee.ntu.edu.tw/publication/paper/[C][2006][ICME][Jing-Ying.Chang][1].pdf

[42] C.-Y. Tsai, T.-C. Chen, T.-W. Chen, and L.-G. Chen, "Bandwidth optimized motion compensation hardware design for H.264/AVC HDTV decoder," in Midwest Symposium on Circuits and Systems (MWSCAS), 2005, pp. 1199-1202 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][MWSCAS][Chuan-Yung.Tsai][1].pdf

[43] C.-H. Tsai, Y.-W. Huang, and L.-G. Chen, "Algorithm and architecture optimization for full-mode encoding of H.264/AVC intra prediction," in Midwest Symposium on Circuits and Systems (MWSCAS), 2005, pp. 47-50 Vol. 1. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][MWSCAS][Chen-Han.Tsai][1].pdf

[44] C. H. Tsai, Y. J. Chen, and L.-G. Chen, "Analysis and Architecture Design for Multi-Symbol Arithmetic Encoder in H.264/AVC," in SOC Design Conference, 2005.

[45] C.-S. Shih, C.-L. Yang, M.-K. Ku, T.-W. Kuo, S.-Y. Chien, Y.-W. Chang, and L.-G. Chen, "Reconfigurable platform for content science research," in IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2005, pp. 481-486. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][RTCSA][Chi-Sheng.Shih][1].pdf

[46] C.-H. Pan, I. H. Lee, S.-C. Huang, C.-C. Cheng, C. Lian, Jr., and L.-G. Chen, "Application Layer Error Correction Scheme for Video Header Protection on Wireless Network," in IEEE International Symposium on Multimedia, 2005. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISM][Chia-Ho.Pan][1].pdf

[47] C.-P. Lin, P.-C. Tseng, and L.-G. Chen, "Nearly Lossless Content-Dependent Low-Power DCT Design for Mobile Video Applications," in IEEE International Conference on Multimedia and Expo (ICME), 2005, pp. 1238-1241. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICME][Chia-Ping.Lin][1].pdf

[48] C. Lian, Jr., Y.-W. Huang, H.-C. Fang, Y.-C. Chang, and L.-G. Chen, "JPEG, MPEG-4, and H.264 Codec IP Development," in Design, Automation and Test in Europe, 2005, pp. 1118-1119 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][DATE][Chung-Jr.Lian][1].pdf

[49] Y.-W. Huang, C.-L. Lee, C.-Y. Chen, and L.-G. Chen, "One-pass computation-aware motion estimation with adaptive search strategy," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 5469-5472 Vol. 6. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Yu-Wen.Huang][1].pdf

[50] Y.-W. Huang, T.-C. Chen, C.-H. Tsai, C.-Y. Chen, T.-W. Chen, C.-S. Chen, C.-F. Shen, S.-Y. Ma, T.-C. Wang, B.-Y. Hsieh, H.-C. Fang, and L.-G. Chen, "A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications," in IEEE International Solid-State Circuits Conference. Digest of Technical Papers (ISSCC), 2005, pp. 128-588 Vol. 1. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISSCC][Yu-Wen.Huang][1].pdf

[51] S.-W. Huang, L.-G. Chen, and T.-H. Tsai, "Memory and computationally efficient psychoacoustic model for MPEG AAC on 16-bit fixed-point processors," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 3155-3158 Vol. 4. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Shih-Way.Huang][1].pdf

[52] S. W. Huang, T. H. Tsai, and L.-G. Chen, "Fast Filterbanks for the Low Power MPEG High Efficiency Advanced Audio Coding Decoder," in Audio Engineering Society (AES), 2005.

[53] C.-T. Huang, C.-Y. Chen, Y.-H. Chen, and L.-G. Chen, "Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications]," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2005, pp. v/93-v/96 Vol. 5. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICASSP][Chao-Tsung.Huang][1].pdf

[54] H.-C. Fang, Y.-W. Chang, C.-C. Cheng, C.-C. Chen, and L.-G. Chen, "Memory efficient JPEG2000 architecture with stripe pipeline scheme," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2005, pp. v/1-v/4 Vol. 5. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICASSP][Hung-Chi.Fang][1].pdf

[55] L.-F. Ding, S.-Y. Chien, Y.-W. Huang, Y.-L. Chang, and L.-G. Chen, "Stereo video coding system with hybrid coding based on joint prediction scheme," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 6082-6085 Vol. 6. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Li-Fu.Ding][1].pdf

[56] L.-F. Ding, S.-Y. Chien, and L.-G. Chen, "720 ? 480 30fps Efficient Prediction Core Chip for Stereo Video Hybrid Coding System," in Asian Solid-State Circuits Conference (ASSCC), 2005, pp. 529-532. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ASSCC][Li-Fu.Ding][1].pdf

[57] L.-F. Ding, S.-Y. Chien, and L.-G. Chen, "Algorithm and architecture of prediction core in stereo video hybrid coding system," in IEEE Workshop on Signal Processing Systems Design and Implementation, 2005, pp. 538-543. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][IEEE.Workshop.on.Signal.Processing.Systems.Design.and.Implementation][Li-Fu.Ding][1].pdf

[58] T. D. Chuang, Y. H. Chen, C. H. Tsai, and L.-G. Chen, "Analysis and Architecture Design for Multi-transform for H.264/AVC High Profile," in SOC Design Conference, 2005.

[59] C.-C. Cheng, P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "Multi-mode embedded compression codec engine for power-aware video coding system," in IEEE Workshop on Signal Processing Systems Design and Implementation, 2005, pp. 532-537. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][IEEE.Workshop.on.Signal.Processing.Systems.Design.and.Implementation][Chih-Chi.Cheng][1].pdf

[60] C.-C. Cheng, C.-T. Huang, P.-C. Tseng, C.-H. Pan, and L.-G. Chen, "Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 5190-5193 Vol. 5. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Chih-Chi.Cheng][1].pdf

[61] Y.-H. Chen, T.-C. Chen, and L.-G. Chen, "Hardware oriented content-adaptive fast algorithm for variable block-size integer motion estimation in H.264," in International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2005, pp. 341-344. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISPACS][Yu-Han.Chen][1].pdf

[62] Y.-H. Chen, C.-Y. Chen, and L.-G. Chen, "Architecture of global motion compensation for MPEG-4 advanced simple profile," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 1798-1801 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Yi-Hau.Chen][1].pdf

[63] W.-Y. Chen, Y.-L. Chang, S.-F. Lin, L.-F. Ding, and L.-G. Chen, "Efficient Depth Image Based Rendering with Edge Dependent Depth Filter and Interpolation," in IEEE International Conference on Multimedia and Expo (ICME), 2005, pp. 1314-1317. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICME][Wan-Yu.Chen][1].pdf

[64] T.-W. Chen, Y.-W. Huang, T.-C. Chen, Y.-H. Chen, C.-Y. Tsai, and L.-G. Chen, "Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 2931-2934 Vol. 3. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][To-Wei.Chen][1].pdf

[65] T.-C. Chen, Y.-W. Huang, C.-Y. Tsai, C.-T. Huang, and L.-G. Chen, "Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC," in IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 1790-1793 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISCAS][Tung-Chien.Chen][1].pdf

[66] T.-C. Chen, Y.-W. Huang, C.-Y. Tsai, B.-Y. Hsieh, and L.-G. Chen, "Dual-block-pipelined VLSI architecture of entropy coding for H.264/AVC baseline profile," in International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2005, pp. 271-274. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][VLSI-DAT][Tung-Chien.Chen][1].pdf

[67] T.-C. Chen, Y.-H. Chen, K.-C. Wu, and L.-G. Chen, "Hybrid-mode embedded compression for H.264/AVC video coding system," in International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2005, pp. 257-260. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ISPACS][Tung-Chien.Chen][1].pdf

[68] C.-Y. Chen, C.-T. Huang, Y.-H. Chen, C. Lian, Jr., and L.-G. Chen, "System analysis of VLSI architecture for motion-compensated temporal filtering," in IEEE International Conference on Image Processing (ICIP), 2005, pp. III-992-5. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICIP][Ching-Yeh.Chen][1].pdf

[69] C.-C. Chen, Y.-W. Chang, H.-C. Fang, and L.-G. Chen, "Analysis and architecture for memory efficient JBIG2 arithmetic encoder," in Midwest Symposium on Circuits and Systems, 2005, pp. 1191-1194 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][MWSCAS][Chun-Chia.Chen.][1].pdf

[70] Y.-W. Chang, H.-C. Fang, C.-C. Chen, and L.-G. Chen, "Area Efficient Architecture for the Embedded Block Coding in JPEG 2000," in Asian Solid-State Circuits Conference (ASSCC), 2005, pp. 517-520. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ASSCC][Yu-Wei.Chang][1].pdf

[71] Y.-L. Chang, C.-Y. Chen, S.-F. Lin, and L.-G. Chen, "Four field variable block size motion compensated adaptive de-interlacing," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2005, pp. ii/913-ii/916 Vol. 2. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][ICASSP][Yu-Lin.Chang][1].pdf

[72] J.-Y. Chang, C. Lian, Jr., H.-C. Fang, and L.-G. Chen, "Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval," in Advances in Multimedia Information Processing (PCM), 2005, pp. 130-137. http://video.ee.ntu.edu.tw/publication/paper/[C][2005][PCM][Jing-Ying.Chang][1].pdf

[73] P.-C. Tseng, C.-T. Haung, and L.-G. Chen, "Reconfigurable discrete cosine transform processor for object-based video signal processing," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-353-6 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Po-Chih.Tseng][1].pdf

[74] P.-C. Tseng and L.-G. Chen, "Hardware architecture design for visual processing: present and future," in IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, 2004, pp. 6-9. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][AP-ASIC][Po-Chih.Tseng][1].pdf

[75] S.-S. Lin, P.-C. Tseng, C.-P. Lin, and L.-G. Chen, "Multi-mode content-aware motion estimation algorithm for power-aware video coding systems," in IEEE Workshop on Signal Processing Systems (SIPS), 2004, pp. 239-244. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][SIPS][Siou-Shen.Lin][1].pdf

[76] S.-S. Lin, P.-C. Tseng, and L.-G. Chen, "Low-power parallel tree architecture for full search block-matching motion estimation," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-313-16 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Siou-Shen.Lin][1].pdf

[77] P.-J. Lee, H.-H. Chen, and L.-G. Chen, "A new error concealment algorithm for H.264 video transmission," in International Symposium on Intelligent Multimedia, Video and Speech Processing, 2004, pp. 619-622. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISIMP][Pei-Jun.Lee][1].pdf

[78] Y.-W. Huang, C.-H. Tsai, and L.-G. Chen, "Parallel global elimination algorithm and architecture design for fast block matching motion estimation," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2004, pp. V-153-6 vol.5. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICASSP][Yu-Wen.Huang][1].pdf

[79] Y.-W. Huang, B.-Y. Hsieh, T.-C. Chen, and L.-G. Chen, "Hardware architecture design for H.264/AVC intra frame coder," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-269-72 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Yu-Wen.Huang][1].pdf

[80] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "Memory analysis and architecture for two-dimensional discrete wavelet transform," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2004, pp. V-13-16 vol.5. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICASSP][Chao-Tsung.Huang.][1].pdf

[81] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "B-spline factorization-based architecture for inverse discrete wavelet transform," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-829-32 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Chao-Tsung.Huang][1].pdf

[82] H.-C. Fang, C.-T. Huang, Y.-W. Chang, T.-C. Wang, P.-C. Tseng, C. Lian, Jr., and L.-G. Chen, "81MS/s JPEG2000 single-chip encoder with rate-distortion optimization," in IEEE International Solid-State Circuits Conference. Digest of Technical Papers (ISSCC), 2004, pp. 328-531 Vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISSCC][Hung-Chi.Fang][1].pdf

[83] H.-C. Fang, Y.-W. Chang, and L.-G. Chen, "Area efficient architecture for the embedded block coding in JPEG 2000," in Midwest Symposium on Circuits and Systems (MWSCAS), 2004, pp. II-457-II-460 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][MWSCAS][Hung-Chi.Fang][1].pdf

[84] T.-C. Chen, Y.-W. Huang, and L.-G. Chen, "Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2004, pp. V-9-12 vol.5. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICASSP][Tung-Chien.Chen.][1].pdf

[85] T.-C. Chen, Y.-W. Huang, and L.-G. Chen, "Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-273-6 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Tung-Chien.Chen][1].pdf

[86] C.-Y. Chen, S.-Y. Chien, W.-M. Chao, Y.-W. Huang, and L.-G. Chen, "Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-301-4 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Ching-Yeh.Chen][1].pdf

[87] Y.-W. Chang, H.-C. Fang, C. Lian, Jr., and L.-G. Chen, "Novel precompression rate-distortion optimization algorithm for JPEG 2000," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2004, pp. 1353-1361. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][VCIP][Yu-Wei.Chang][1].pdf

[88] Y.-W. Chang, H.-C. Fang, and L.-G. Chen, "High performance two-symbol arithmetic encoder in JPEG 2000," in IEEE International Symposium on Consumer Electronics (ICCE), 2004, pp. 101-104. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICCE][Yu-Wei.Chang][1].pdf

[89] Y.-L. Chang, P.-H. Wu, S.-F. Lin, and L.-G. Chen, "Four field local motion compensated de-interlacing," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2004, pp. V-253-6 vol.5. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICASSP][Yu-Lin.Chang][1].pdf

[90] Y.-L. Chang, S.-F. Lin, and L.-G. Chen, "Extended intelligent edge-based line average with its implementation and test method," in International Symposium on Circuits and Systems (ISCAS), 2004, pp. II-341-4 Vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ISCAS][Yu-Lin.Chang][1].pdf

[91] Y.-C. Chang, C.-W. Hsu, and L.-G. Chen, "MPEG-4 FGS encoder design for an interactive content-aware MPEG-4 video streaming SOC," in IEEE International Workshop on System-on-Chip for Real-Time Applications, 2004, pp. 172-175. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][IWSOC][Yung-Chi.Chang][1].pdf

[92] Y.-C. Chang, W.-M. Chao, and L.-G. Chen, "Platform-based MPEG-4 video encoder SOC design," in IEEE Workshop on Signal Processing Systems (SIPS), 2004, pp. 251-256. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][SIPS][Yung-Chi.Chang][1].pdf

[93] Y.-C. Chang, W.-M. Chao, and L.-G. Chen, "LSI design for MPEG-4 coding system," in Midwest Symposium on Circuits and Systems (MWSCAS), 2004, pp. II-453-II-456 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][MWSCAS][Yung-Chi.Chang][1].pdf

[94] J.-Y. Chang, C. Lian, Jr., and L.-G. Chen, "Architecture and analysis of color structure and scalable color descriptor for real-time video indexing and retrieval," in IEEE International Symposium on Consumer Electronics (ICCE), 2004, pp. 365-369. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICCE][Jing-Ying.Chang][1].pdf

[95] J.-Y. Chang, H.-C. Fang, Y.-W. Huang, and L.-G. Chen, "Architecture of MPEG-7 color structure description generator for realtime video applications," in International Conference on Image Processing (ICIP), 2004, pp. 2813-2816 Vol. 4. http://video.ee.ntu.edu.tw/publication/paper/[C][2004][ICIP][Jing-Ying.Chang][1].pdf

[96] T.-C. Wang, Y.-W. Huang, H.-C. Fang, and L.-G. Chen, "Performance analysis of hardware oriented algorithm modification in H.264," in International Conference on Multimedia and Expo (ICME), 2003, pp. III-601-4 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][Tu-Chih.Wang][1].pdf

[97] T.-C. Wang, Y.-W. Huang, H.-C. Fang, and L.-G. Chen, "Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-800-II-803 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Tu-Chih.Wang][1].pdf

[98] P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "Reconfigurable discrete wavelet transform architecture for advanced multimedia systems," in IEEE Workshop on Signal Processing Systems (SIPS), 2003, pp. 137-141. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][SIPS][Po-Chih.Tseng][1].pdf

[99] P.-C. Tseng and L.-G. Chen, "Perspectives of multimedia SoC," in IEEE Workshop on Signal Processing Systems (SIPS), 2003, p. 3. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][SIPS][Po-Chih.Tseng][2].pdf

[100] T.-H. Tsai, S.-W. Huang, and L.-G. Chen, "Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-552-II-555 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Tsung-Han.Tsai][1].pdf

[101] S.-F. Lin, Y.-L. Chang, and L.-G. Chen, "Motion adaptive de-interlacing by horizontal motion detection and enhanced ELA processing," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-696-II-699 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Shyh-Feng.Lin][1].pdf

[102] P.-J. Lee, M.-J. Chen, and L.-G. Chen, "Error concealment algorithm using interested direction for JPEG 2000 image transmission," in IEEE International Conference on Consumer Electronics (ICCE), 2003, pp. 182-183. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICCE][Pei-Jun.Lee][1].pdf

[103] Y.-W. Huang, T.-C. Wang, B.-Y. Hsieh, and L.-G. Chen, "Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-796-II-799 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Yu-Wen.Huang][1].pdf

[104] Y.-W. Huang, B.-Y. Hsieh, T.-C. Wang, S.-Y. Chien, S.-Y. Ma, C.-F. Shen, and L.-G. Chen, "Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264," in International Conference on Multimedia and Expo (ICME), 2003, pp. II-809-12 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][Yu-Wen.Huang][1].pdf

[105] Y.-W. Huang, T.-W. Chen, B.-Y. Hsieh, T.-C. Wang, T.-H. Chang, and L.-G. Chen, "Architecture design for deblocking filter in H.264/JVT/AVC," in International Conference on Multimedia and Expo (ICME), 2003, pp. I-693-6 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][To-Wei.Chen][1].pdf

[106] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank," in International Conference on Image Processing (ICIP), 2003, pp. II-571-4 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICIP][Chao-Tsung.Huang][1].pdf

[107] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "VLSI architecture for discrete wavelet transform based on B-spline factorization," in IEEE Workshop on Signal Processing Systems (SIPS), 2003, pp. 346-350. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][SIPS][Chao-Tsung.Huang][1].pdf

[108] C.-W. Hsu, Y.-C. Chang, W.-M. Chao, and L.-G. Chen, "Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-784-II-787 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Chih-Wei.Hsu][1].pdf

[109] B.-Y. Hsieh, Y.-W. Huang, T.-C. Wang, S.-Y. Chien, and L.-G. Chen, "Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria," in Visual Communications and Image Processing (VCIP), Lugano, Switzerland, 2003, pp. 1551-1560. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][VCIP][Bing-Yu.Hsieh][1].PDF

[110] H.-C. Fang, T.-C. Wang, C. Lian, Jr., T.-H. Chang, and L.-G. Chen, "High speed memory efficient EBCOT architecture for JPEG2000," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-736-II-739 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Hung-Chi.Fang].pdf

[111] H.-C. Fang, T.-C. Wang, Y.-W. Chang, Y.-Y. Shih, and L.-G. Chen, "Novel word-level algorithm of embedded block coding in JPEG 2000," in International Conference on Multimedia and Expo (ICME), 2003, pp. I-137-40 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][Hung-Chi.Fang][1].pdf

[112] H.-C. Fang, T.-C. Wang, Y.-W. Chang, and L.-G. Chen, "Hardware oriented rate control algorithm and implementation for realtime video coding," in International Conference on Multimedia and Expo (ICME), 2003, pp. III-421-4 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][Hung-Chi.Fang][2].pdf

[113] S.-Y. Chien, S.-H. Yu, L.-F. Ding, Y.-N. Huang, and L.-G. Chen, "Efficient stereo video coding system for immersive teleconference with two-stage hybrid disparity estimation algorithm," in International Conference on Image Processing (ICIP), 2003, pp. I-749-52 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICIP][Shao-Yi.Chien][1].pdf

[114] S.-Y. Chien, S.-H. Yu, L.-F. Ding, Y.-N. Huang, and L.-G. Chen, "Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach," in Visual Communications and Image Processing (VCIP), Lugano, Switzerland, 2003, pp. 1521-1530. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][VCIP][Shao-Yi.Chien][1].pdf

[115] S.-Y. Chien, C.-Y. Chen, W.-M. Chao, Y.-W. Huang, and L.-G. Chen, "Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-720-II-723 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Shao-Yi.Chien][1].pdf

[116] C.-Y. Chen, S.-Y. Chien, Y.-H. Chen, Y.-W. Huang, and L.-G. Chen, "Unsupervised object-based sprite coding system for tennis sport," in International Conference on Multimedia and Expo (ICME), 2003, pp. I-337-40 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICME][Ching-Yeh.Chen][1].pdf

[117] W.-M. Chao, T.-C. Chen, Y.-C. Chang, C.-W. Hsu, and L.-G. Chen, "Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-788-II-791 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ISCAS][Wei-Min.Chao][1].pdf

[118] W.-M. Chao, Y.-C. Chang, C.-W. Hsu, and L.-G. Chen, "Platform architecture design for MPEG-4 video coding," in International Conference on Image Processing (ICIP), 2003, pp. III-93-6 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICIP][Wei-Min.Chao][1].pdf

[119] Y.-L. Chang, C.-Y. Chen, S.-F. Lin, and L.-G. Chen, "Motion compensated de-interlacing with adaptive global motion estimation and compensation," in International Conference on Image Processing (ICIP), 2003, pp. III-693-6 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][ICIP][Yu-Lin.Chang][1].pdf

[120] Y.-C. Chang, C.-C. Huang, W.-M. Chao, and L.-G. Chen, "An efficient embedded bitstream parsing processor for MPEG-4 video decoding system," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 2003, pp. 168-171. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][VLSI-TSA][Yung-Chi.Chang].pdf

[121] T.-H. Chang, C. Lian, Jr., H.-H. Chen, J.-Y. Chang, and L.-G. Chen, "Effective hardware-oriented technique for the rate control of JPEG2000 encoding," in International Symposium on Circuits and Systems (ISCAS), 2003, pp. II-684-II-687 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2003][Te-Hao.Chang][1].pdf

[122] P.-C. Wu, C.-T. Huang, and L.-G. Chen, "An efficient architecture for two-dimensional inverse discrete wavelet transform," in IEEE International Symposium on Circuits and Systems. ISCAS), 2002, pp. II-312-II-315 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Po-Cheng.Wu][1].pdf

[123] T.-C. Wang, H.-C. Fang, and L.-G. Chen, "Low delay, error robust wireless video transmission architecture for video communication," in IEEE International Conference on Multimedia and Expo (ICME), 2002, pp. 265-268 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICME][Tu-Chih.Wang][1].pdf

[124] T.-C. Wang, H.-C. Fang, W.-M. Chao, H.-H. Chen, and L.-G. Chen, "An UVLC encoder architecture for H.26L," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. II-308-II-311 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Tu-Chih.Wang][1].pdf

[125] P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method," in Asia-Pacific Conference on Circuits and Systems (APCCAS), 2002, pp. 363-366 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][APPCCAS][Po-Chih.Tseng][1].pdf

[126] P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "VLSI implementation of shape-adaptive discrete wavelet transform," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2002, pp. 655-666. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][VCIP][Po-Chih.Tseng][1].pdf

[127] P.-J. Lee and L.-G. Chen, "Error recovery for MPEG-4 shape and texture information," in Asia-Pacific Conference on Circuits and Systems (APCCAS), 2002, pp. 525-528 vol.1.

[128] P.-J. Lee and L.-G. Chen, "Bit-plane error recovery via cross subband for image transmission in JPEG2000," in IEEE International Conference on Multimedia and Expo (ICME), 2002, pp. 149-152 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICME][Pei-Jun.Lee][1].pdf

[129] Y.-K. Lai, L.-G. Chen, J.-Y. Lai, and T.-M. Parng, "VLSI architecture design and implementation for TWOFISH block cipher," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. II-356-II-359 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Yeong-Kang.Lai][1].pdf

[130] Y.-W. Huang, B.-Y. Hsieh, S.-Y. Chien, and L.-G. Chen, "Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera," in IEEE International Conference on Multimedia and Expo (ICME), 2002, pp. 789-792 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICME][Yu-Wen.Huang][1].pdf

[131] Y.-W. Huang, S.-Y. Chien, B.-Y. Hsieh, and L.-G. Chen, "An efficient and low power architecture design for motion estimation using global elimination algorithm," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2002, pp. III-3120-III-3123 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICASSP][Yu-Wen.Huang][1].pdf

[132] Y.-W. Huang, S.-Y. Chien, B.-Y. Hsieh, and L.-G. Chen, "Automatic threshold decision of background registration technique for video segmentation," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2002, pp. 552-563. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][VCIP][Yu-Wen.Huang][1].pdf

[133] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform," in Asia-Pacific Conference on Circuits and Systems (APCCAS), 2002, pp. 383-388 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][APCCAS][Chao-Tsung.Huang][1].pdf

[134] C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. V-565-V-568 vol.5. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Chao-Tsung.Huang][1].pdf

[135] C. W. Hsu, W. M. Chao, Y. C. Chang, and L.-G. Chen, "Texture coder design of MPEG-4 video by using interleaving schedule," in IEEE International Conference on Multimedia and Expo (ICME), 2002. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICME][C.-W.Hsu][1].pdf

[136] H.-C. Fang, T.-C. Wang, and L.-G. Chen, "Real-time deblocking filter for MPEG-4 systems," in Asia-Pacific Conference on Circuits and Systems (APCCAS), 2002, pp. 541-544 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][IPCCAS][Hung-Chi.Fang][1].pdf

[137] S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, and L.-G. Chen, "Predictive watershed for image sequences segmentation," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2002, pp. III-3196-III-3199 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICASSP][Shao-Yi.Chien][1].pdf

[138] S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, and L.-G. Chen, "Algorithm and architecture of video segmentation hardware system with a programmable PE array," in IEEE Workshop on Signal Processing Systems (SIPS), 2002, pp. 21-26. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][SIPS][Shao-Yi.Chien][1].pdf

[139] S.-Y. Chien, Y.-W. Huang, B.-Y. Hsieh, and L.-G. Chen, "Single chip video segmentation system with a programmable PE array," in IEEE Asia-Pacific Conference on ASIC, 2002, pp. 233-236. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][APCASIC][Shao-Yi.Chien][1].pdf

[140] S.-Y. Chien, Y.-W. Huang, and L.-G. Chen, "A hardware accelerator for video segmentation using programmable morphology PE array," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. IV-341-IV-344 vol.4. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Shao-Yi.Chien][1].pdf

[141] S.-Y. Chien, C.-Y. Chen, Y.-W. Huang, and L.-G. Chen, "Multiple sprites and frame skipping techniques for sprite generation with high subjective quality and fast speed," in IEEE International Conference on Multimedia and Expo (ICME), 2002, pp. 785-788 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICME][Shao-Yi.Chien][1].pdf

[142] S.-Y. Chien, C.-Y. Chen, W.-M. Chao, C.-W. Hsu, Y.-W. Huang, and L.-G. Chen, "A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques," in International Conference on Image Processing (ICIP), 2002, pp. I-193-I-196 vol.1. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICIP][Shao-Yi.Chien][1].pdf

[143] H.-H. Chen, C. Lian, Jr., T.-H. Chang, and L.-G. Chen, "Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. IV-329-IV-332 vol.4. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Hong-Hui.Chen][1].pdf

[144] W.-M. Chao, C.-W. Hsu, Y.-C. Chang, and L.-G. Chen, "A novel hybrid motion estimator supporting diamond search and fast full search," in IEEE International Symposium on Circuits and Systems (ISCAS), 2002, pp. II-492-II-495 vol.2. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ISCAS][Wei-Min.Chao][1].pdf

[145] T.-H. Chang, L.-L. Chen, C. Lian, Jr., H.-H. Chen, and L.-G. Chen, "Computation reduction technique for lossy JPEG2000 encoding through EBCOT Tier-2 feedback processing," in International Conference on Image Processing (ICIP), 2002, pp. III-85-III-88 vol.3. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICIP][Te-Hao.Chang][1].pdf

[146] T.-C. Wang, P.-C. Tseng, and L.-G. Chen, "H.26L intra mode encoder architecture for digital camera application," in IEEE International Conference on Consumer Electronics (ICCE), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2002][ICCE][Tu-Chih.Wang][1].pdf

[147] P.-C. Tseng, C.-K. Chen, and L.-G. Chen, "CDSP: an application-specific digital signal processor for third generation wireless communication," in International Conference on Consumer Electronics (ICCE), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICCE][Po-Chih.Tseng][1].pdf

[148] S. F. Lin, W. S. Ji, and L.-G. Chen, "An efficient test bitstream design methodology for fast visual hardware simulation," in Picture Coding Symposium (PCS), 2001.

[149] C.-J. Lian, L.-G. Chen, H.-C. Chang, and Y.-C. Chang, "Design and implementation of JPEG encoder IP core," in Proceedings of the conference on Asia South Pacific design automation Yokohama, Japan: ACM, 2001.

[150] C. J. Lian, K. F. Chen, H. H. Chen, and L.-G. Chen, "Lifting based discrete wavelet transform architecture for JPEG2000," in IEEE International Symposium on Circuits and Systems (ISCAS), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ISCAS][Chung-Jr.Lian][1].pdf

[151] C. J. Lian, H. C. Chang, K. F. Chen, and L.-G. Chen, "A JPEG decoder IP core supporting user-defined Huffman table decoding," in IEEE International Symposium on Integrated Circuits, 2001.

[152] P.-J. Lee, L.-G. Chen, W.-J. Wang, and M.-J. Chen, "Robust error concealment algorithm for MPEG-4 with the aid of fuzzy theory," in International Conference on Consumer Electronics (ICCE), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICCE][Pei-Jun.Lee][1].pdf

[153] M. Y. Hsu, H. C. Chang, Y. C. Wang, and L.-G. Chen, "Scalable module-based architecture for MPEG-4 BMA motion estimation," in IEEE International Symposium on Circuits and Systems (ISCAS), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ISCAS][M.-Y.Hsu][1].pdf

[154] S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, "Partial-result-reuse architecture and its design technique for morphological operations," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICASSP][Shao-Yi.Chien][1].pdf

[155] S.-Y. Chien, Y.-W. Huang, S.-Y. Ma, and L.-G. Chen, "A hybrid morphology processing units architecture for real-time video segmentation systems," in IEEE International Symposium on Circuits and Systems (ISCAS), 2001.

[156] S. Y. Chien, Y. W. Huang, S. Y. Ma, and L.-G. Chen, "Automatic video segmentation for MPEG-4 using predictive watershed," in IEEE International Conference on Multimedia and Expo (ICME), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICME][Shao-Yi.Chien][1].pdf

[157] S. Y. Chien, Y. W. Huang, S. Y. Ma, and L.-G. Chen, "A real-time practical video segmentation algorithm for MPEG-4 camera systems," in IEEE International Conference on Consumer Electronics (ICCE), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICCE][Shao-Yi.Chien][1].pdf

[158] L.-G. Chen, C. Lian, Jr., K.-F. Chen, and H.-H. Chen, "Analysis and architecture design of JPEG2000," in IEEE International Conference on Multimedia and Expo (ICME), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICME][Liang-Gee.Chen][1].pdf

[159] K.-F. Chen, C. Lian, Jr., H.-H. Chen, and L.-G. Chen, "Analysis and architecture design of EBCOT for JPEG-2000," in IEEE International Symposium on Circuits and Systems (ISCAS), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ISCAS][Kuan-Fu.Chen][1].pdf

[160] Y. C. Chang, C. C. Huang, H. C. Chang, H. C. Fang, and L.-G. Chen, "Error-propagation analysis and concealment strategy for MPEG-4 video bitstream with data partitioning," in IEEE International Conference on Multimedia and Expo (ICME), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ICME][Y.-C.Chang][1].pdf

[161] H. C. Chang, Z. L. Yang, C. J. Lian, and L.-G. Chen, "Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding," in IEEE International Symposium on Circuits and Systems (ISCAS), 2001. http://video.ee.ntu.edu.tw/publication/paper/[C][2001][ISCAS][H.-C.Chang][1].pdf

[162] Y.-C. Wang, H.-C. Chang, W.-M. Chao, and L.-G. Chen, "Efficient architecture of binary motion estimation for MPEG-4 shape coding," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 2000, pp. 959-967. http://video.ee.ntu.edu.tw/publication/paper/[C][2000][VCIP][Yi-Chu.Wang][1].pdf

[163] S.-Y. Ma, S.-Y. Chien, and L.-G. Chen, "An efficient moving object segmentation for MPEG-4 encoding systems," in IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2000.

[164] Y. W. Huang, S. Y. Chien, S. Y. Ma, and L.-G. Chen, "Analysis of global motion effects on video segmentation," in Asia Pacific Conference on Multimedia Technology and Applications (APCMTA), 2000.

[165] S.-Y. Chien, S.-Y. Ma, and L.-G. Chen, "An efficient video segmentation algorithm for real-time MPEG-4 camera system," in Visual Communications and Image Processing (VCIP), Perth, Australia, 2000, pp. 1087-1098. http://link.aip.org/link/?PSI/4067/1087/1

[166] C. Y. Chen, T. C. Wang, and L.-G. Chen, "A programmable VLSI architecture for 2D discrete wavelet transform," in IEEE International Symposium on Circuits and Systems (ISCAS), 2000.

[167] H. C. Chang, L.-G. Chen, and M. Y. Hsu, "Performance analysis and architecture evaluation of MPEG-4 video codec system," in IEEE International Symposium on Circuits and Systems (ISCAS), 2000. http://video.ee.ntu.edu.tw/publication/paper/[C][2000][ISCAS][H.-C.Chang][1].pdf

[168] H. C. Chang and Y. C. Chang, "MPEG-4 video bitstream structure analysis and its parsing architecture design," in IEEE International Symposium on Circuits and Systems (ISCAS), 2000. http://video.ee.ntu.edu.tw/publication/paper/[C][2000][ISCAS][H.-C.Chang][2].pdf

[169] P.-C. Wu and L.-G. Chen, "An efficient architecture for two-dimensional discrete wavelet transform," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1999, pp. 112-115.

[170] P. C. Wu, "High-performance architecture design for two-dimensional discrete wavelet transform," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1999.

[171] R. M. Weng, L.-G. Chen, and M. H. Lee, "Synthesis of cascadable Nth-order current-mode lowpass filters using CCII+s," in IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 1999.

[172] T.-H. Tsai, L.-G. Chen, and R. Wu, Jr., "A cost-effective design for MPEG2 audio decoder with embedded RISC core," in IEEE Workshop on Signal Processing Systems (SIPS), 1999, pp. 361-369.

[173] T. H. Tsai, L.-G. Chen, and R. J. Wu, "A system level integration methodology for MPEG-2 audio decoder with embedded RISC core," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1999.

[174] T. H. Tsai, "A novel inverse quantization and multichannel processing architecture for MPEG-2 audio applications," in IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 1999.

[175] J.-F. Shen, L.-G. Chen, H.-C. Chang, and T.-C. Wang, "Low power full-search block-matching motion estimation chip for H.263+," in IEEE International Symposium on Circuits and Systems (ISCAS), 1999, pp. 299-302 vol.4.

[176] S.-Y. Ma and L.-G. Chen, "A single chip CMOS APS camera with direct frame difference output," in IEEE Custom Integrated Circuits., 1999, pp. 287-290.

[177] C.-W. Ku, F.-Y. Kuo, C.-K. Chen, and L.-G. Chen, "Low power strategy about correlator array for CDMA baseband processor," in IEEE Workshop on Signal Processing Systems (SIPS), 1999, pp. 513-522.

[178] S.-C. Huang, L.-G. Chen, and H.-C. Chang, "A novel image compression algorithm by using Log-Exp transform," in IEEE International Symposium on Circuits and Systems (ISCAS), 1999, pp. 17-20 vol.4.

[179] S. C. Huang, "A LOG-EXP still image compression chip design," in IEEE International Conference on Consumer Electronics (ICCE), 1999.

[180] H.-C. Chang, L.-L. Chen, C. Lian, Jr., Y.-C. Chang, and L.-G. Chen, "IP design of a reconfigurable baseline JPEG coding," in The First IEEE Asia Pacific Conference on ASICs (AP-ASIC), 1999, pp. 143-146.

[181] H.-C. Chang, L.-G. Chen, Y.-C. Chang, and S.-C. Huang, "A VLSI architecture design of VLC encoder for high data rate video/image coding," in IEEE International Symposium on Circuits and Systems (ISCAS), 1999, pp. 398-401 vol.4.

[182] T.-H. Tsai, L.-G. Chen, and R. Wu, Jr., "A simple and low-cost MPEG audio degrouping algorithm," in Fourth International Conference on Signal Processing Proceedings (ICSP), 1998, pp. 1154-1157 vol.2.

[183] T.-H. Tsai, L.-G. Chen, S.-C. Huang, and H.-C. Chang, "A low-cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder," in IEEE International Symposium on Circuits and Systems (ISCAS), 1998, pp. 65-68 vol.4.

[184] T.-H. Tsai, L.-G. Chen, H.-C. Chang, and S.-C. Huang, "A modified MPEG-2 audio decoding scheme based on its low-cost fast algorithm and efficient data scheduling," in IEEE International Symposium on Circuits and Systems (ISCAS), 1998, pp. 530-533 vol.5.

[185] Y.-C. Liu, T.-H. Tsai, P.-C. Wu, and L.-G. Chen, "Vlsi Implementation Of Visual Block Pattern Truncation Coding," in International Conference on Consumer Electronics (ICCE), 1998, pp. 36-37.

[186] Y.-K. Lai and L.-G. Chen, "Vlsi Implementation Of The Motion Estimator With Two-dimensional Data-reuse," in International Conference on Consumer Electronics (ICCE), 1998, pp. 128-129.

[187] Y. K. Lai, "VLSI implementation of motion estimator with two-dimensional data-reuse," in IEEE International Conference on Consumer Electronics (ICCE), 1998.

[188] L.-G. Chen, J.-Y. Jiu, H.-C. Chang, Y.-P. Lee, and C.-W. Ku, "Low power 2D DCT chip design for wireless multimedia terminals," in IEEE International Symposium on Circuits and Systems (ISCAS), 1998, pp. 41-44 vol.4.

[189] L.-G. Chen, J.-Y. Jiu, H.-C. Chang, Y.-P. Lee, and C.-W. Ku, "A low power 2D DCT chip design using direct 2D algorithm," in Asia and South Pacific Design Automation Conference (ASP-DAC), 1998, pp. 145-150.

[190] L. G. Chen, J. Y. Jiu, and H. C. Chang, "Design and implementation of low-power DCT chip for portable multimedia terminals," in IEEE Workshop on Signal Processing Systems (SIPS), 1998, pp. 85-93.

[191] H.-T. Chen, L.-G. Chen, S.-C. Huang, T.-H. Tsai, and H.-C. Chang, "An adaptive network control scheme for region-based hybrid coding algorithm," in IEEE International Symposium on Circuits and Systems (ISCAS), 1998, pp. 174-177 vol.4.

[192] C.-H. Chen, L.-G. Chen, and H.-C. Chang, "Using a region-based blurring method and bits reallocation to enhance quality on face region in very low bitrate video," in IEEE International Symposium on Circuits and Systems (ISCAS), 1998, pp. 134-137 vol.4.

[193] H.-C. Chang and L.-G. Chen, "An efficient modeling architecture for real-time content-based arithmetic coding," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 1998, pp. 708-715. http://link.aip.org/link/?PSI/3653/708/1

[194] P.-C. Wu, L.-G. Chen, Y.-C. Liu, and Y.-K. Lai, "Hardware efficient design of filter banks for video coding," in IEEE International Symposium on Circuits and Systems (ISCAS), 1997, pp. 1213-1216 vol.2.

[195] T.-H. Tsai, L.-G. Chen, Y.-C. Liu, Y.-K. Lai, and P.-C. Wu, "A Novel MPEG-2 Audio Decoder With Efficient Data Arrangement And Memory Configuration," in International Conference on Consumer Electronics. Digest of Technical Papers (ICCE), 1997, pp. 212-213.

[196] T.-H. Tsai, L.-G. Chen, and R.-X. Chen, "Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture," in IEEE Workshop on Signal Processing Systems (SIPS), 1997, pp. 293-300.

[197] Y.-C. Liu, L.-G. Chen, P.-C. Wu, Y.-K. Lai, T.-H. Tsai, and Y.-P. Lee, "A True Color Video Signal Processing System And Its Real-time Chip Implementation," in International Conference on Consumer Electronics (ICCE), 1997, pp. 238-239.

[198] S. Liao and L.-G. Chen, "A Low-power Low-voltage Direct Digital Frequency Synthesizer," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1997, pp. 265-269.

[199] Y.-K. Lai, L.-G. Chen, T.-H. Tsai, and P.-C. Wu, "A novel scalable architecture with memory interleaving organization for full search block-matching algorithm," in IEEE International Symposium on Circuits and Systems (ISCAS), 1997, pp. 1229-1232 vol.2.

[200] Y.-K. Lai, L.-G. Chen, T.-H. Tsai, and P.-C. Wu, "A flexible high-throughput VLSI architecture with 2-D data-reuse for full-search motion estimation," in International Conference on Image Processing (ICIP), 1997, pp. 144-147 vol.2.

[201] Y.-K. Lai, L.-G. Chen, and J.-F. Shen, "An efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm," in IEEE International Symposium on Circuits and Systems (ISCAS), 1997, pp. 1361-1364 vol.2.

[202] Y.-K. Lai, L.-G. Chen, and Y.-P. Lee, "A flexible data-interlacing architecture for full-search block-matching algorithm," in IEEE International Conference on Application-Specific Systems, Architectures and Processors, 1997, pp. 96-104.

[203] Y. K. Lai, G. S. Lin, C. W. Ku, and L.-G. Chen, "A novel VLSI architecture of motion estimator for H.263 video coding," in International Symposium on Multimedia Information Processing (ISMIP), 1997.

[204] C.-W. Ku, G.-S. Lin, L.-G. Chen, and Y.-P. Lee, "Architecture design of motion estimation for ITU-T H.263," in Visual Communications and Image Processing (VCIP), San Jose, CA, USA, 1997, pp. 482-493. http://link.aip.org/link/?PSI/3024/482/1

[205] R.-X. Chen, M.-J. Chen, L.-G. Chen, and T.-H. Tsai, "The system implementation of I-phone hardware by using low bit rate speech coding," in IEEE Workshop on Signal Processing Systems (SIPS), 1997, pp. 489-499.

[206] R.-X. Chen, L.-G. Chen, M.-J. Chen, and T.-H. Tsai, "An I-phone system design and implementation with a portable speech coding coprocessor," in IEEE International Conference on Consumer Electronics (ICCE), 1997.

[207] M.-J. Chen, L.-G. Chen, R.-M. Weng, and Y.-P. Lee, "Efficient hierarchical motion estimation algorithm based on visual pattern block segmentation," in IEEE International Symposium on Circuits and Systems (ISCAS), 1997, pp. 1429-1432 vol.2.

[208] M.-J. Chen, L.-G. Chen, and R.-X. Chen, "Error resilience for block loss with overlapped motion compensation," in International Conference on Image Processing (ICIP), 1997, pp. 105-108 vol.2.

[209] L.-G. Chen, "A real-time face recognition system," in International Symposium on Multimedia Information Processing (ISMIP), 1997.

[210] C.-T. Chen and L.-G. Chen, "High-speed VLSI design of the LZ-based data compression," in IEEE International Symposium on Circuits and Systems (ISCAS), 1997.

[211] P.-C. Wu, L.-G. Chen, Y.-K. Lai, and T.-H. Tsai, "Design strategy for three-dimensional subband filter banks," in International Conference on Image Processing (ICIP), 1996, pp. 605-608 vol.1.

[212] P. C. Wu, L.-G. Chen, Y. C. Liu, and Y. K. Lai, "Investigation of filtering permutation schemes in three-dimensional subband filter banks," in IEEE International Conference on Communication Systems (ICCS) and IEEE International Workshop on Intelligent Signal Processing and Communication Systems, 1996.

[213] P. C. Wu, L.-G. Chen, and H. T. Chen, "A new method for reduction of blocking effects," in IEEE International Conference on Communication Systems (ICCS) and IEEE International Workshop on Intelligent Signal Processing and Communication Systems, 1996.

[214] B. E. Spielman and L. G. Chen, "A full-wave analysis for microwave, planar, distributed discontinuities," in IEEE MTT-S International Microwave Symposium Digest, 1996, pp. 1055-1058 vol.2.

[215] Y. C. Liu, "Visual pattern BTC," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1996.

[216] Y.-P. Lee, L.-G. Chen, M.-J. Chen, and C.-W. Ku, "A new design and implementation of 8×8 2-D DCT/IDCT," in Workshop on VLSI Signal Processing, 1996, pp. 408-417.

[217] Y.-K. Lai, L.-G. Chen, and M.-C. Chiang, "A novel video signal processor with reconfigurable pipelined architecture," in IEEE International Symposium on Circuits and Systems (ISCAS), 1996, pp. 73-76 vol.4.

[218] Y.-K. Lai and L.-G. Chen, "A Novel Video Signal Processor with Programmable Data Arrangement and Efficient Memory Configuration," in International Conference on Consumer Electronics (ICCE), 1996, p. 182.

[219] Y. K. Lai, "Programmable video processor design," in IEEE International Symposium on Circuits and Systems (ISCAS), 1996.

[220] C.-W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, "Building a pseudo object-oriented very low bit-rate video coding system from a modified optical flow motion estimation algorithm," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1996, pp. 2064-2067 vol. 4.

[221] C.-W. Ku, Y.-M. Chiu, L.-G. Chen, and Y.-P. Lee, "The arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system," in IEEE International Symposium on Circuits and Systems (ISCAS), 1996, pp. 790-793 vol.2.

[222] C.-W. Ku, L.-G. Chen, Y.-M. Chiu, and Y.-P. Lee, "A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation," in International Conference on Image Processing (ICIP), 1996, pp. 653-656 vol.1.

[223] C.-W. Ku, L.-G. Chen, C.-H. Chen, J.-Y. Chiu, and C.-T. Huang, "INVESTIGATION OF A VISUAL TELEPHONE PROTOTYPING ON PERSONAL COMPUTERS," in International Conference on Consumer Electronics (ICCE), 1996, p. 386.

[224] Y.-M. Chiu, L.-G. Chen, Y.-P. Lee, and C.-W. Ku, "Three-step search motion estimation chip for MPEG-2 applications," in Digital Compression Technologies and Systems for Video Communications, Berlin, Germany, 1996, pp. 608-616. http://link.aip.org/link/?PSI/2952/608/1

[225] Y.-W. Chen, L.-G. Chen, and M.-J. Chen, "A very low bit rate video coding system using adaptive region-classified vector quantization," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1996, pp. 1205-1208 vol. 2.

[226] L.-G. Chen and Y.-C. Liu, "An efficient visual pattern block truncation coding," in IEEE International Symposium on Circuits and Systems (ISCAS), 1996, pp. 770-773 vol.2.

[227] H.-T. Chen and L.-G. Chen, "A Multimedia Video Conference System: Using Region Base Hybrid Coding," in International Conference on Consumer Electronics (ICCE), 1996, p. 398.

[228] C.-T. Chen and L.-G. Chen, "A self-adjusting weighted median filter for removing impulse noise in images," in International Conference on Image Processing (ICIP), 1996, pp. 419-422 vol.1.

[229] C.-T. Chen and L.-G. Chen, "VLSI Implementation of a Selective Median Filter," in International Conference on Consumer Electronics (ICCE), 1996, p. 134.

[230] C.-T. Chen and L.-G. Chen, "A Novel Architecture for Lempel-Ziv-Based Data Compression," in International Conference on Consumer Electronics (ICCE), 1996, p. 210.

[231] T.-H. Tsai, T.-H. Chen, and L.-G. Chen, "Design and VLSI implementation of MPEG audio decoder," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1995, pp. 206-210.

[232] Y.-P. Lee, L.-G. Chen, and C.-W. Ku, "Architecture design of MPEG-2 decoder system," in International Conference on Consumer Electronics (ICCE), 1995, pp. 258-259.

[233] Y. P. Lee, L.-G. Chen, and C. W. Ku, "Architecture design of MPEG-2 systems," in IEEE International Conference on Consumer Electronics (ICCE), 1995.

[234] W.-T. Lee, T.-H. Chen, and L.-G. Chen, "A VLSI architecture for radix-2^k Viterbi decoding with transpose algorithm," in International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 1995, pp. 219-223.

[235] W. T. Lee, T. H. Chen, and L.-G. Chen, "The VLSI design of a radix-2^k transpose Viterbi decoder," in International Symposium on Communications (ISCOM), 1995.

[236] C.-W. Ku, L.-G. Chen, and Y.-M. Chiu, "A very low bit rate video coding system based on optical flow and region segmentation algorithms," in Visual Communications and Image Processing (VCIP), Taipei, Taiwan, 1995, pp. 1318-1327. http://link.aip.org/link/?PSI/2501/1318/1

[237] L.-G. Chen, P.-C. Wu, and T.-D. Chiueh, "Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks," in IEEE Workshop on VLSI Signal Processing, 1995, pp. 342-351.

[238] L.-G. Chen, C. W. Ku, D. L. Huang, and Y. P. Lee, "Algorithm and VLSI design of a feature-based classified vector quantizer for image coding," in International Symposium on Communications, 1995.

[239] C.-T. Chen, L.-G. Chen, and J.-H. Hsiao, "A hardware-oriented design for weighted median filters," in Asian and South Pacific Design Automation Conference (ASP-DAC), 1995, pp. 441-445.

[240] C.-T. Chen, L.-G. Chen, and J.-H. Hsiao, "A hardware-oriented design for weighted median filters," in Conference on Asia Pacific design automation (CD-ROM) Makuhari, Massa, Chiba, Japan: ACM, 1995.

[241] C. T. Chen, L.-G. Chen, and J. H. Hsiao, "A block processing of the running order algorithm for order statistic filters," in International Symposium on Communications (ISCOM), 1995.

[242] M.-H. Chao, W.-T. Lee, M.-C. Lin, and L.-G. Chen, "IC design of an adaptive Viterbi decoder," in IEEE International Conference on Consumer Electronics (ICCE), 1995.

[243] W.-T. Lee, T.-H. Chen, and L.-G. Chen, "The radix-2^k Viterbi decoding with transpose path metric processor," in IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 1994, pp. 194-199.

[244] C.-W. Ku, L.-G. Chen, T.-D. Chiueh, and H.-M. Jong, "Tree-structure architecture and VLSI implementation for vector quantization algorithms," in IEEE International Symposium on Circuits and Systems (ISCAS), 1994, pp. 139-142 vol.4.

[245] H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, "Modifications and performance improvements of 3-step search block-matching algorithm for video coding," in International Symposium on Speech, Image Processing and Neural Networks (ISSIPNN), 1994, pp. 256-259 vol.1.

[246] H.-M. Jong, L.-G. Chen, and T.-D. Chiueh, "Parallel architectures of 3-step search block-matching algorithm for video coding," in IEEE International Symposium on Circuits and Systems (ISCAS), 1994, pp. 209-212 vol.3.

[247] S.-C. Huang, L.-G. Chen, and T.-H. Chen, "The chip design of a 32-b logarithmic number system," in IEEE International Symposium on Circuits and Systems (ISCAS), 1994, pp. 167-170 vol.4.

[248] S. C. Huang, L.-G. Chen, and T. H. Chen, "The chip design of 32-b logarithm number system," in IEEE International Symposium on Circuits and Systems (ISCAS), 1994.

[249] J.-H. Hsiao, L.-G. Chen, T.-D. Chiueh, and C.-T. Chen, "High throughput CORDIC-based systolic array design for the discrete cosine transform," in IEEE International Symposium on Circuits and Systems (ISCAS), 1994, pp. 85-88 vol.2.

[250] L.-G. Chen, Y.-M. Chiu, T.-D. Chiueh, and H.-M. Jong, "Object-oriented video coding algorithm for very low bit-rate system," in IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 1994, pp. 614-618.

[251] L.-G. Chen, K. N. Cheng, M. J. Chen, and T. D. Chiueh, "Design of a hybrid tree/linear array architecture for motion estimation," in International Computer Symposium (ICS), 1994.

[252] C.-T. Chen, L.-G. Chen, T.-D. Chiueh, and J.-H. Hsiao, "Design and VLSI implementation of real-time weighted median filters," in IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 1994, pp. 91-96.

[253] C.-T. Chen, L.-G. Chen, T.-D. Chiueh, and J.-H. Hsiao, "An efficient pipelined VLSI implementation of rank order filter," in International Symposium on Speech, Image Processing and Neural Networks (ISSIPNN), 1994, pp. 630-633 vol.2.

[254] L.-G. Jeng and L.-G. Chen, "Rate-Optimal DSP Synthesis by Pipeline and Minimum Unfolding," in International Conference on VLSI Design, 1993, pp. 148-153.

[255] J. H. Hsiao, L. G. Chen, T. D. Chiueh, and C. T. Chen, "Novel systolic array design for the discrete Hartley transform with high throughput rate," in IEEE International Symposium on Circuits and Systems (ISCAS), 1993, pp. 1567-1570 vol.3.

[256] P. Chen, J. M. Shyu, and L. G. Chen, "Hardware verification using symbolic state transition graphs," in IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD), 1993, pp. 54-57.

[257] W. T. Lee, Y. P. Lee, L.-G. Chen, and M. C. Lin, "The implementation of viterbi decoder with adaptive algorithm," in International Conference on Microwave and Communication (ICMC), 1992.

[258] Y. S. Jehng, L.-G. Chen, and T. D. Chiueh, "A motion estimator for low bit-rate video codec," in International Conference on Microwave and Communication (ICMC), 1992.

[259] Y. S. Jehng, "Realization of array architecture for video compression algorithms," in IEEE International Symposium on Circuits and Systems (ISCAS), 1992.

[260] T.-H. Chen, L.-G. Chen, and Y.-S. Jehng, "A partitioning approach to design fault-tolerant arithmetic arrays," in Eleventh Annual International Phoenix Conference on Computers and Communications, 1992, pp. 432-439.

[261] T.-H. Chen, L.-G. Chen, and Y.-S. Chang, "Design of concurrent error-detectable VLSI-based array dividers," in IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD), 1992, pp. 72-75.

[262] L.-G. Chen, Y. C. Liu, and T. D. Chiueh, "Video data compression using an efficient BTC based system," in IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 1992.

[263] D. J. Lin, "On design of DSP chips using behavioral silicon compiler," in International Symposium on Communications, 1991.

[264] C.-Y. Kuo, L.-G. Chen, and T.-M. Parng, "An automatic synthesizer for CMOS operational amplifiers," in European Conference on Design Automation (EDAC), 1991, pp. 470-474.

[265] C.-Y. Kuo, L.-G. Chen, and T.-M. Parng, "An automatic synthesizer for CMOS operational amplifiers," in Proceedings of the conference on European design automation, Amsterdam, The Netherlands, 1991.

[266] L.-G. Jeng and L.-G. Chen, "A globally static rate optimal scheduling for recursive DSP algorithms," in International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1991, pp. 1005-1008 vol.2.

[267] T. H. Chen, L.-G. Chen, and Y. S. Jehng, "The chip design for fault-tolerant FFT processor," in International Symposium on Communications, 1991.

[268] L.-G. Chen and L.-G. Jeng, "Optimal module set and clock cycle selection for DSP synthesis," in IEEE International Sympoisum on Circuits and Systems (ISCAS), 1991, pp. 2200-2203 vol.4.

[269] L.-G. Chen, W.-T. Chen, Y.-S. Jehng, and C.-T. Chuch, "An efficient parallel motion estimation algorithm for digital image processing," in IEEE International Sympoisum on Circuits and Systems (ISCAS), 1991, pp. 670-673 vol.1.

[270] L.-G. Chen and T.-H. Chen, "A concurrent error-detectable module design for FFT processing," in International Conference on Circuits and Systems, 1991, pp. 839-842 vol.2.

[271] L. G. Chen, W. T. Chen, Y. S. Jehng, and T. D. Chiueh, "A predictive parallel motion estimation algorithm for digital image processing," in IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD), 1991, pp. 617-620.

[272] C. T. Chao, "Intelligent digital filter synthesis system," in International Symposium on Communications, 1991.

[273] C. Y. Kuo, L.-G. Chen, and T. M. Parng, "A new approach to CMOS operational amplifier synthesis," in International Computer Symposium, 1990.

[274] Y. S. Jehng, L.-G. Chen, T. D. Chiueh, W. Chen, and H. M. Jong, "Pipeline interleaving design for FIR, IIR, and FFT," in Synthesis and Simulation Meeting and International Interchange (SASIMI), 1990.

[275] Y. S. Jehng, L.-G. Chen, and T. D. Chiueh, "Low latency tree architectures for motion estimation algorithms," in IASTED International Symposium on Adaptive Control and Signal Processing, 1990.

[276] L.-G. Chen, L.-G. Jeng, K. T. Chao, D. J. Lin, and C. T. Chao, "CAD system for an application-specific DSP processor design," in Synthesis and Simulation Meeting and International Interchange, 1990.

[277] L.-G. Chen, Y. S. Jehng, and T. M. Parng, "Automatic schematic environment for CAD frameworks," in International Electronic Devices and Materials Symposium, 1990.

[278] L.-G. Chen, Y. S. Jehng, and T. D. Chiueh, "Array architecture design for video communication applications," in International Computer Symposium, 1990.

[279] L.-G. Chen, "An error detectable FFT processor," in ISMM Computer Applications on Design, 1990.

[280] J. Y. Han and L. G. Chen, "Upper bound of direct-remove suboptimum for perturbation-iteration method in bin packing problems," in The 32nd Midwest Symposium on Circuits and Systems, 1989, pp. 661-664 vol.1.

[281] L. G. Chen and T. H. Chen, "Computation with simultaneously concurrent error detection using bi-directional operands," in IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD), 1989, pp. 128-131.

[282] L.-G. Chen, "RECO: a novel circuit design for concurrent error detection," in International Conference on Solid State and Integrated Circuit Technology (ICSICT), 1989.

[283] L.-G. Chen, "How expert system aids aerial photographic interpretation," in International Computer Symposium (ICS), 1988.

[284] L.-G. Chen, J. F. Wang, J. Y. Lee, and H. T. Lee, "A hierarchical filter for circuit layout," in IEEE of International Symposium on Circuits and Systems (ISCAS), 1986.

[285] L.-G. Chen, J. Y. Lee, K. T. Chen, and J. F. Wang, "A new comparison algorithm for verifying logic interconnection of VLSI," in IEEE International Symposium on Circuits and Systems (ISCAS), 1985.

[286] L.-G. Chen, J. Y. Lee, K. T. Chen, and J. F. Wang, "An algorithm for verifying circuit connectivity of VLSI," in International Devices and Materials Symposium, 1984.

[287] K. T. Chen, L.-G. Chen, J. Y. Lee, and J. F. Wang, "Logic synthesis for CMOS and NMOS VLSI circuits," in International Devices and Materials Symposium, 1984.

[288] Y. K. Su, C. Y. Chang, T. S. Wu, M. K. Lee, M. P. Houng, and L.-G. Chen, "Growth and properties of GaP/Si devices by MOCVD," in International Conference on CVD, 1981.